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Searched refs:num_tx_sched_layers (Results 1 – 3 of 3) sorted by relevance

/drivers/net/ethernet/intel/ice/
Dice_sched.c695 for (ln = 0; ln < pi->hw->num_tx_sched_layers; ln++) { in ice_sched_clear_rl_prof()
797 hw->num_tx_sched_layers = 0; in ice_sched_cleanup_all()
1002 return hw->num_tx_sched_layers - ICE_QGRP_LAYER_OFFSET; in ice_sched_get_qgrp_layer()
1019 if (hw->num_tx_sched_layers > ICE_VSI_LAYER_OFFSET + 1) { in ice_sched_get_vsi_layer()
1020 u8 layer = hw->num_tx_sched_layers - ICE_VSI_LAYER_OFFSET; in ice_sched_get_vsi_layer()
1213 hw->num_tx_sched_layers = le16_to_cpu(buf->sched_props.logical_levels); in ice_sched_query_res_alloc()
1226 for (i = 0; i < hw->num_tx_sched_layers - 1; i++) { in ice_sched_query_res_alloc()
1232 (hw->num_tx_sched_layers * in ice_sched_query_res_alloc()
1892 for (ln = 0; ln < pi->hw->num_tx_sched_layers; ln++) { in ice_sched_rm_unused_rl_prof()
2359 if (layer_index >= hw->num_tx_sched_layers) in ice_sched_get_rl_prof_layer()
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Dice_type.h599 u8 num_tx_sched_layers; member
Dice_common.c3944 status = ice_sched_add_node(pi, hw->num_tx_sched_layers - 1, &node); in ice_ena_vsi_txq()