/drivers/gpu/drm/amd/amdgpu/ |
D | amdgpu_irq.c | 124 if (!src || !src->funcs->set || !src->num_types) in amdgpu_irq_disable_all() 127 for (k = 0; k < src->num_types; ++k) { in amdgpu_irq_disable_all() 382 if (source->num_types && !source->enabled_types) { in amdgpu_irq_add_id() 385 types = kcalloc(source->num_types, sizeof(atomic_t), in amdgpu_irq_add_id() 503 for (k = 0; k < src->num_types; k++) in amdgpu_irq_gpu_reset_resume_helper() 527 if (type >= src->num_types) in amdgpu_irq_get() 557 if (type >= src->num_types) in amdgpu_irq_put() 588 if (type >= src->num_types) in amdgpu_irq_enabled()
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D | mxgpu_nv.c | 348 adev->virt.ack_irq.num_types = 1; in xgpu_nv_mailbox_set_irq_funcs() 350 adev->virt.rcv_irq.num_types = 1; in xgpu_nv_mailbox_set_irq_funcs()
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D | mxgpu_ai.c | 324 adev->virt.ack_irq.num_types = 1; in xgpu_ai_mailbox_set_irq_funcs() 326 adev->virt.rcv_irq.num_types = 1; in xgpu_ai_mailbox_set_irq_funcs()
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D | amdgpu_irq.h | 61 unsigned num_types; member
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D | mxgpu_vi.c | 572 adev->virt.ack_irq.num_types = 1; in xgpu_vi_mailbox_set_irq_funcs() 574 adev->virt.rcv_irq.num_types = 1; in xgpu_vi_mailbox_set_irq_funcs()
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D | nbio_v7_4.c | 459 adev->nbio.ras_controller_irq.num_types = 1; in nbio_v7_4_init_ras_controller_interrupt() 477 adev->nbio.ras_err_event_athub_irq.num_types = 1; in nbio_v7_4_init_ras_err_event_athub_interrupt()
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D | sdma_v4_0.c | 2475 adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE1; in sdma_v4_0_set_irq_funcs() 2476 adev->sdma.ecc_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE1; in sdma_v4_0_set_irq_funcs() 2479 adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_LAST; in sdma_v4_0_set_irq_funcs() 2480 adev->sdma.ecc_irq.num_types = AMDGPU_SDMA_IRQ_LAST; in sdma_v4_0_set_irq_funcs() 2484 adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE2; in sdma_v4_0_set_irq_funcs() 2485 adev->sdma.ecc_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE2; in sdma_v4_0_set_irq_funcs()
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D | gmc_v10_0.c | 150 adev->gmc.vm_fault.num_types = 1; in gmc_v10_0_set_irq_funcs() 154 adev->gmc.ecc_irq.num_types = 1; in gmc_v10_0_set_irq_funcs()
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D | uvd_v6_0.c | 414 adev->uvd.inst->irq.num_types = 1; in uvd_v6_0_sw_init() 1629 adev->uvd.inst->irq.num_types = adev->uvd.num_enc_rings + 1; in uvd_v6_0_set_irq_funcs() 1631 adev->uvd.inst->irq.num_types = 1; in uvd_v6_0_set_irq_funcs()
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D | jpeg_v3_0.c | 594 adev->jpeg.inst->irq.num_types = 1; in jpeg_v3_0_set_irq_funcs()
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D | vce_v2_0.c | 643 adev->vce.irq.num_types = 1; in vce_v2_0_set_irq_funcs()
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D | jpeg_v2_5.c | 623 adev->jpeg.inst[i].irq.num_types = 1; in jpeg_v2_5_set_irq_funcs()
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D | gmc_v9_0.c | 645 adev->gmc.vm_fault.num_types = 1; in gmc_v9_0_set_irq_funcs() 649 adev->gmc.ecc_irq.num_types = 1; in gmc_v9_0_set_irq_funcs()
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D | uvd_v4_2.c | 772 adev->uvd.inst->irq.num_types = 1; in uvd_v4_2_set_irq_funcs()
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D | dce_virtual.c | 760 adev->crtc_irq.num_types = AMDGPU_CRTC_IRQ_VBLANK6 + 1; in dce_virtual_set_irq_funcs()
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D | uvd_v3_1.c | 525 adev->uvd.inst->irq.num_types = 1; in uvd_v3_1_set_irq_funcs()
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D | jpeg_v2_0.c | 817 adev->jpeg.inst->irq.num_types = 1; in jpeg_v2_0_set_irq_funcs()
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D | uvd_v5_0.c | 881 adev->uvd.inst->irq.num_types = 1; in uvd_v5_0_set_irq_funcs()
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D | vega10_ih.c | 565 adev->irq.self_irq.num_types = 0; in vega10_ih_set_self_irq_funcs()
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D | dce_v6_0.c | 3435 adev->crtc_irq.num_types = AMDGPU_CRTC_IRQ_VLINE1 + adev->mode_info.num_crtc; in dce_v6_0_set_irq_funcs() 3437 adev->crtc_irq.num_types = 0; in dce_v6_0_set_irq_funcs() 3440 adev->pageflip_irq.num_types = adev->mode_info.num_crtc; in dce_v6_0_set_irq_funcs() 3443 adev->hpd_irq.num_types = adev->mode_info.num_hpd; in dce_v6_0_set_irq_funcs()
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/drivers/gpu/drm/i915/gvt/ |
D | vgpu.c | 109 unsigned int num_types; in intel_gvt_init_vgpu_types() local 127 num_types = ARRAY_SIZE(vgpu_types); in intel_gvt_init_vgpu_types() 129 gvt->types = kcalloc(num_types, sizeof(struct intel_vgpu_type), in intel_gvt_init_vgpu_types() 135 for (i = 0; i < num_types; ++i) { in intel_gvt_init_vgpu_types() 168 gvt->num_types = i; in intel_gvt_init_vgpu_types() 193 for (i = 0; i < gvt->num_types; i++) { in intel_gvt_update_vgpu_types()
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D | gvt.c | 57 for (i = 0; i < gvt->num_types; i++) { in intel_gvt_find_vgpu_type() 135 for (i = 0; i < gvt->num_types; i++) { in intel_gvt_init_vgpu_type_groups() 163 for (i = 0; i < gvt->num_types; i++) { in intel_gvt_cleanup_vgpu_type_groups()
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D | gvt.h | 313 unsigned int num_types; member
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/drivers/gpu/drm/amd/display/amdgpu_dm/ |
D | amdgpu_dm_irq.c | 742 adev->crtc_irq.num_types = adev->mode_info.num_crtc; in amdgpu_dm_set_irq_funcs() 745 adev->vupdate_irq.num_types = adev->mode_info.num_crtc; in amdgpu_dm_set_irq_funcs() 748 adev->pageflip_irq.num_types = adev->mode_info.num_crtc; in amdgpu_dm_set_irq_funcs() 751 adev->hpd_irq.num_types = adev->mode_info.num_hpd; in amdgpu_dm_set_irq_funcs()
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/drivers/usb/host/ |
D | xhci-tegra.c | 195 unsigned int num_types; member 1145 for (i = 0; i < tegra->soc->num_types; i++) { in tegra_xusb_get_phy() 1478 for (i = 0; i < tegra->soc->num_types; i++) { in tegra_xusb_probe() 1491 for (i = 0, k = 0; i < tegra->soc->num_types; i++) { in tegra_xusb_probe() 1915 .num_types = ARRAY_SIZE(tegra124_phy_types), 1951 .num_types = ARRAY_SIZE(tegra210_phy_types), 1992 .num_types = ARRAY_SIZE(tegra186_phy_types), 2024 .num_types = ARRAY_SIZE(tegra194_phy_types),
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