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Searched refs:nvkm_falcon (Results 1 – 25 of 41) sorted by relevance

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/drivers/gpu/drm/nouveau/include/nvkm/engine/
Dfalcon.h4 #define nvkm_falcon(p) container_of((p), struct nvkm_falcon, engine) macro
18 struct nvkm_falcon { struct
60 struct nvkm_falcon **); argument
62 void nvkm_falcon_del(struct nvkm_falcon **);
63 int nvkm_falcon_get(struct nvkm_falcon *, const struct nvkm_subdev *);
64 void nvkm_falcon_put(struct nvkm_falcon *, const struct nvkm_subdev *);
78 void (*init)(struct nvkm_falcon *);
79 void (*intr)(struct nvkm_falcon *, struct nvkm_fifo_chan *);
84 void (*load_imem)(struct nvkm_falcon *, void *, u32, u32, u16, u8, bool);
85 void (*load_dmem)(struct nvkm_falcon *, void *, u32, u32, u8);
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Dnvdec.h11 struct nvkm_falcon falcon;
Dnvenc.h11 struct nvkm_falcon falcon;
/drivers/gpu/drm/nouveau/include/nvkm/core/
Dfalcon.h6 const char *name, u32 addr, struct nvkm_falcon *);
7 void nvkm_falcon_dtor(struct nvkm_falcon *);
9 void nvkm_falcon_v1_load_imem(struct nvkm_falcon *,
11 void nvkm_falcon_v1_load_dmem(struct nvkm_falcon *, void *, u32, u32, u8);
12 void nvkm_falcon_v1_read_dmem(struct nvkm_falcon *, u32, u32, u8, void *);
13 void nvkm_falcon_v1_bind_context(struct nvkm_falcon *, struct nvkm_memory *);
14 int nvkm_falcon_v1_wait_for_halt(struct nvkm_falcon *, u32);
15 int nvkm_falcon_v1_clear_interrupt(struct nvkm_falcon *, u32);
16 void nvkm_falcon_v1_set_start_addr(struct nvkm_falcon *, u32 start_addr);
17 void nvkm_falcon_v1_start(struct nvkm_falcon *);
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/drivers/gpu/drm/nouveau/nvkm/falcon/
Dbase.c28 nvkm_falcon_load_imem(struct nvkm_falcon *falcon, void *data, u32 start, in nvkm_falcon_load_imem()
42 nvkm_falcon_load_dmem(struct nvkm_falcon *falcon, void *data, u32 start, in nvkm_falcon_load_dmem()
53 nvkm_falcon_read_dmem(struct nvkm_falcon *falcon, u32 start, u32 size, u8 port, in nvkm_falcon_read_dmem()
64 nvkm_falcon_bind_context(struct nvkm_falcon *falcon, struct nvkm_memory *inst) in nvkm_falcon_bind_context()
76 nvkm_falcon_set_start_addr(struct nvkm_falcon *falcon, u32 start_addr) in nvkm_falcon_set_start_addr()
82 nvkm_falcon_start(struct nvkm_falcon *falcon) in nvkm_falcon_start()
88 nvkm_falcon_enable(struct nvkm_falcon *falcon) in nvkm_falcon_enable()
105 nvkm_falcon_disable(struct nvkm_falcon *falcon) in nvkm_falcon_disable()
120 nvkm_falcon_reset(struct nvkm_falcon *falcon) in nvkm_falcon_reset()
131 nvkm_falcon_wait_for_halt(struct nvkm_falcon *falcon, u32 ms) in nvkm_falcon_wait_for_halt()
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Dv1.c29 nvkm_falcon_v1_load_imem(struct nvkm_falcon *falcon, void *data, u32 start, in nvkm_falcon_v1_load_imem()
68 nvkm_falcon_v1_load_emem(struct nvkm_falcon *falcon, void *data, u32 start, in nvkm_falcon_v1_load_emem()
93 nvkm_falcon_v1_load_dmem(struct nvkm_falcon *falcon, void *data, u32 start, in nvkm_falcon_v1_load_dmem()
124 nvkm_falcon_v1_read_emem(struct nvkm_falcon *falcon, u32 start, u32 size, in nvkm_falcon_v1_read_emem()
151 nvkm_falcon_v1_read_dmem(struct nvkm_falcon *falcon, u32 start, u32 size, in nvkm_falcon_v1_read_dmem()
183 nvkm_falcon_v1_bind_context(struct nvkm_falcon *falcon, struct nvkm_memory *ctx) in nvkm_falcon_v1_bind_context()
225 nvkm_falcon_v1_set_start_addr(struct nvkm_falcon *falcon, u32 start_addr) in nvkm_falcon_v1_set_start_addr()
231 nvkm_falcon_v1_start(struct nvkm_falcon *falcon) in nvkm_falcon_v1_start()
242 nvkm_falcon_v1_wait_for_halt(struct nvkm_falcon *falcon, u32 ms) in nvkm_falcon_v1_wait_for_halt()
255 nvkm_falcon_v1_clear_interrupt(struct nvkm_falcon *falcon, u32 mask) in nvkm_falcon_v1_clear_interrupt()
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Dmsgq.c35 struct nvkm_falcon *falcon = msgq->qmgr->falcon; in nvkm_falcon_msgq_close()
54 struct nvkm_falcon *falcon = msgq->qmgr->falcon; in nvkm_falcon_msgq_pop()
157 struct nvkm_falcon *falcon = msgq->qmgr->falcon; in nvkm_falcon_msgq_recv_initmsg()
Dcmdq.c53 struct nvkm_falcon *falcon = cmdq->qmgr->falcon; in nvkm_falcon_cmdq_push()
73 struct nvkm_falcon *falcon = cmdq->qmgr->falcon; in nvkm_falcon_cmdq_open()
/drivers/gpu/drm/nouveau/include/nvkm/subdev/
Dacr.h71 struct nvkm_falcon *falcon;
111 int (*boot)(struct nvkm_falcon *);
113 int (*bootstrap_falcon)(struct nvkm_falcon *, enum nvkm_acr_lsf_id);
114 int (*bootstrap_multiple_falcons)(struct nvkm_falcon *, u32 mask);
118 nvkm_acr_lsfw_load_sig_image_desc(struct nvkm_subdev *, struct nvkm_falcon *,
122 nvkm_acr_lsfw_load_sig_image_desc_v1(struct nvkm_subdev *, struct nvkm_falcon *,
126 nvkm_acr_lsfw_load_bl_inst_data_sig(struct nvkm_subdev *, struct nvkm_falcon *,
Dsecboot.h47 struct nvkm_falcon *boot_falcon;
48 struct nvkm_falcon *halt_falcon;
Dgsp.h9 struct nvkm_falcon falcon;
/drivers/gpu/drm/nouveau/nvkm/engine/
Dfalcon.c32 struct nvkm_falcon *falcon = nvkm_falcon(oclass->engine); in nvkm_falcon_oclass_get()
61 struct nvkm_falcon *falcon = nvkm_falcon(engine); in nvkm_falcon_intr()
98 struct nvkm_falcon *falcon = nvkm_falcon(engine); in nvkm_falcon_fini()
131 struct nvkm_falcon *falcon = nvkm_falcon(engine); in nvkm_falcon_oneinit()
162 struct nvkm_falcon *falcon = nvkm_falcon(engine); in nvkm_falcon_init()
323 return nvkm_falcon(engine); in nvkm_falcon_dtor()
327 nvkm_falcon = { variable
342 struct nvkm_falcon *falcon; in nvkm_falcon_new_()
354 return nvkm_engine_ctor(&nvkm_falcon, device, index, in nvkm_falcon_new_()
/drivers/gpu/drm/nouveau/nvkm/subdev/acr/
Dpriv.h110 struct nvkm_falcon *falcon;
120 struct nvkm_falcon *);
144 struct nvkm_falcon *falcon;
150 struct nvkm_acr *, struct nvkm_falcon *,
Dlsfw.c59 struct nvkm_falcon *falcon, enum nvkm_acr_lsf_id id) in nvkm_acr_lsfw_add()
87 struct nvkm_falcon *falcon, in nvkm_acr_lsfw_load_sig_image_desc_()
141 struct nvkm_falcon *falcon, in nvkm_acr_lsfw_load_sig_image_desc()
161 struct nvkm_falcon *falcon, in nvkm_acr_lsfw_load_sig_image_desc_v1()
181 struct nvkm_falcon *falcon, in nvkm_acr_lsfw_load_bl_inst_data_sig()
/drivers/gpu/drm/nouveau/nvkm/engine/msvld/
Dpriv.h9 void g98_msvld_init(struct nvkm_falcon *);
11 void gf100_msvld_init(struct nvkm_falcon *);
Dgf100.c29 gf100_msvld_init(struct nvkm_falcon *msvld) in gf100_msvld_init()
Dg98.c29 g98_msvld_init(struct nvkm_falcon *msvld) in g98_msvld_init()
/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/
Dpriv.h9 void g98_mspdec_init(struct nvkm_falcon *);
11 void gf100_mspdec_init(struct nvkm_falcon *);
/drivers/gpu/drm/nouveau/nvkm/engine/sec2/
Dgp102.c59 gp102_sec2_acr_bootstrap_falcon(struct nvkm_falcon *falcon, in gp102_sec2_acr_bootstrap_falcon()
78 gp102_sec2_acr_boot(struct nvkm_falcon *falcon) in gp102_sec2_acr_boot()
167 struct nvkm_falcon *falcon = &sec2->falcon; in gp102_sec2_intr()
184 gp102_sec2_flcn_enable(struct nvkm_falcon *falcon) in gp102_sec2_flcn_enable()
193 gp102_sec2_flcn_bind_context(struct nvkm_falcon *falcon, in gp102_sec2_flcn_bind_context()
/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/
Dpriv.h52 int gm20b_pmu_acr_boot(struct nvkm_falcon *);
53 int gm20b_pmu_acr_bootstrap_falcon(struct nvkm_falcon *, enum nvkm_acr_lsf_id);
Dgk20a.c98 struct nvkm_falcon *falcon = &pmu->base.falcon; in gk20a_pmu_dvfs_get_dev_status()
107 struct nvkm_falcon *falcon = &pmu->base.falcon; in gk20a_pmu_dvfs_reset_dev_status()
172 struct nvkm_falcon *falcon = &pmu->falcon; in gk20a_pmu_init()
/drivers/gpu/drm/nouveau/nvkm/engine/ce/
Dpriv.h6 void gt215_ce_intr(struct nvkm_falcon *, struct nvkm_fifo_chan *);
/drivers/gpu/drm/nouveau/nvkm/engine/msppp/
Dpriv.h9 void g98_msppp_init(struct nvkm_falcon *);
Dgf100.c29 gf100_msppp_init(struct nvkm_falcon *msppp) in gf100_msppp_init()
Dg98.c29 g98_msppp_init(struct nvkm_falcon *msppp) in g98_msppp_init()

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