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Searched refs:odn_dpm_table (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dvega10_hwmgr.c309 struct vega10_odn_dpm_table *odn_table = &(data->odn_dpm_table); in vega10_odn_initial_default_setting()
320 data->odn_dpm_table.max_vddc = avfs_params.ulMaxVddc; in vega10_odn_initial_default_setting()
321 data->odn_dpm_table.min_vddc = avfs_params.ulMinVddc; in vega10_odn_initial_default_setting()
1621 &(data->odn_dpm_table.vdd_dep_on_sclk); in vega10_populate_single_gfx_level()
1684 &data->odn_dpm_table.vdd_dep_on_socclk; in vega10_populate_single_soc_level()
1785 …vddc_lookup_table = (struct phm_ppt_v1_voltage_lookup_table *)&data->odn_dpm_table.vddc_lookup_tab… in vega10_populate_vddc_soc_levels()
1822 &data->odn_dpm_table.vdd_dep_on_mclk; in vega10_populate_single_memory_level()
2513 struct vega10_odn_dpm_table *odn_table = &(data->odn_dpm_table); in vega10_check_dpm_table_updated()
2555 struct vega10_odn_dpm_table *odn_table = &(data->odn_dpm_table); in vega10_init_smc_table()
3434 struct vega10_odn_dpm_table *odn_table = &data->odn_dpm_table; in vega10_populate_and_upload_sclk_mclk_dpm_levels()
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Dsmu7_hwmgr.c873 struct smu7_odn_dpm_table *odn_table = &(data->odn_dpm_table); in smu7_odn_initial_default_setting()
939 data->odn_dpm_table.min_vddc = min_vddc; in smu7_setup_voltage_range_from_vbios()
940 data->odn_dpm_table.max_vddc = max_vddc; in smu7_setup_voltage_range_from_vbios()
946 struct smu7_odn_dpm_table *odn_table = &(data->odn_dpm_table); in smu7_check_dpm_table_updated()
1016 if (data->odn_dpm_table.max_vddc) { in smu7_setup_default_dpm_tables()
3859 struct smu7_odn_dpm_table *odn_table = &(data->odn_dpm_table); in smu7_populate_and_upload_sclk_mclk_dpm_levels()
4561 struct smu7_odn_dpm_table *odn_table = &(data->odn_dpm_table); in smu7_print_clock_levels()
4642 data->odn_dpm_table.min_vddc, in smu7_print_clock_levels()
4643 data->odn_dpm_table.max_vddc); in smu7_print_clock_levels()
4995 if (voltage < data->odn_dpm_table.min_vddc || voltage > data->odn_dpm_table.max_vddc) { in smu7_check_clk_voltage_valid()
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Dsmu7_hwmgr.h206 struct smu7_odn_dpm_table odn_dpm_table; member
Dvega10_hwmgr.h330 struct vega10_odn_dpm_table odn_dpm_table; member
Dvega12_hwmgr.h332 struct vega12_odn_dpm_table odn_dpm_table; member
Dvega20_hwmgr.h383 struct vega20_odn_dpm_table odn_dpm_table; member
/drivers/gpu/drm/amd/pm/powerplay/smumgr/
Dfiji_smumgr.c951 …vdd_dep_table = (phm_ppt_v1_clock_voltage_dependency_table *)&data->odn_dpm_table.vdd_dependency_o… in fiji_populate_single_graphic_level()
1173 …vdd_dep_table = (phm_ppt_v1_clock_voltage_dependency_table *)&data->odn_dpm_table.vdd_dependency_o… in fiji_populate_single_memory_level()
Dpolaris10_smumgr.c922 …vdd_dep_table = (phm_ppt_v1_clock_voltage_dependency_table *)&data->odn_dpm_table.vdd_dependency_o… in polaris10_populate_single_graphic_level()
1084 …vdd_dep_table = (phm_ppt_v1_clock_voltage_dependency_table *)&data->odn_dpm_table.vdd_dependency_o… in polaris10_populate_single_memory_level()
Dtonga_smumgr.c630 …vdd_dep_table = (phm_ppt_v1_clock_voltage_dependency_table *)&data->odn_dpm_table.vdd_dependency_o… in tonga_populate_single_graphic_level()
978 …vdd_dep_table = (phm_ppt_v1_clock_voltage_dependency_table *)&data->odn_dpm_table.vdd_dependency_o… in tonga_populate_single_memory_level()