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Searched refs:phy_cmn_mmio (Results 1 – 3 of 3) sorted by relevance

/drivers/gpu/drm/msm/dsi/pll/
Ddsi_pll_7nm.c93 void __iomem *phy_cmn_mmio; member
386 u32 data = pll_read(pll->phy_cmn_mmio + REG_DSI_7nm_PHY_CMN_CTRL_0); in dsi_pll_disable_pll_bias()
389 pll_write(pll->phy_cmn_mmio + REG_DSI_7nm_PHY_CMN_CTRL_0, data & ~BIT(5)); in dsi_pll_disable_pll_bias()
395 u32 data = pll_read(pll->phy_cmn_mmio + REG_DSI_7nm_PHY_CMN_CTRL_0); in dsi_pll_enable_pll_bias()
397 pll_write(pll->phy_cmn_mmio + REG_DSI_7nm_PHY_CMN_CTRL_0, data | BIT(5)); in dsi_pll_enable_pll_bias()
406 data = pll_read(pll->phy_cmn_mmio + REG_DSI_7nm_PHY_CMN_CLK_CFG1); in dsi_pll_disable_global_clk()
407 pll_write(pll->phy_cmn_mmio + REG_DSI_7nm_PHY_CMN_CLK_CFG1, data & ~BIT(5)); in dsi_pll_disable_global_clk()
414 pll_write(pll->phy_cmn_mmio + REG_DSI_7nm_PHY_CMN_CTRL_3, 0x04); in dsi_pll_enable_global_clk()
416 data = pll_read(pll->phy_cmn_mmio + REG_DSI_7nm_PHY_CMN_CLK_CFG1); in dsi_pll_enable_global_clk()
417 pll_write(pll->phy_cmn_mmio + REG_DSI_7nm_PHY_CMN_CLK_CFG1, in dsi_pll_enable_global_clk()
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Ddsi_pll_10nm.c93 void __iomem *phy_cmn_mmio; member
368 u32 data = pll_read(pll->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_CTRL_0); in dsi_pll_disable_pll_bias()
371 pll_write(pll->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_CTRL_0, in dsi_pll_disable_pll_bias()
378 u32 data = pll_read(pll->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_CTRL_0); in dsi_pll_enable_pll_bias()
380 pll_write(pll->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_CTRL_0, in dsi_pll_enable_pll_bias()
390 data = pll_read(pll->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_CLK_CFG1); in dsi_pll_disable_global_clk()
391 pll_write(pll->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_CLK_CFG1, in dsi_pll_disable_global_clk()
399 data = pll_read(pll->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_CLK_CFG1); in dsi_pll_enable_global_clk()
400 pll_write(pll->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_CLK_CFG1, in dsi_pll_enable_global_clk()
421 pll_write(pll_10nm->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_PLL_CNTRL, in dsi_pll_10nm_vco_prepare()
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Ddsi_pll_14nm.c123 void __iomem *phy_cmn_mmio; member
491 void __iomem *cmn_base = pll_14nm->phy_cmn_mmio; in pll_14nm_software_reset()
511 void __iomem *cmn_base = pll->phy_cmn_mmio; in pll_db_commit_14nm()
682 void __iomem *base = pll_14nm->phy_cmn_mmio; in dsi_pll_14nm_postdiv_recalc_rate()
715 void __iomem *base = pll_14nm->phy_cmn_mmio; in dsi_pll_14nm_postdiv_set_rate()
742 void __iomem *slave_base = pll_14nm_slave->phy_cmn_mmio; in dsi_pll_14nm_postdiv_set_rate()
766 void __iomem *cmn_base = pll_14nm->phy_cmn_mmio; in dsi_pll_14nm_enable_seq()
788 void __iomem *cmn_base = pll_14nm->phy_cmn_mmio; in dsi_pll_14nm_disable_seq()
799 void __iomem *cmn_base = pll_14nm->phy_cmn_mmio; in dsi_pll_14nm_save_state()
817 void __iomem *cmn_base = pll_14nm->phy_cmn_mmio; in dsi_pll_14nm_restore_state()
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