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Searched refs:pll_range (Results 1 – 10 of 10) sorted by relevance

/drivers/media/usb/dvb-usb/
Ddib0700_devices.c226 .pll_range = 3,
392 .pll_range = 3,
661 .pll_range = 3,
953 .pll_range = 3,
1179 .pll_range = 3,
1518 .pll_range = 3,
1606 .io.pll_range = 1,
1955 .pll_range = 1,
1999 .io.pll_range = 0,
2330 .io.pll_range = 1,
[all …]
Ddib0700_core.c401 u8 pll_src, u8 pll_range, u8 clock_gpio3, u16 pll_prediv, in dib0700_set_clock() argument
414 (pll_range << 5) | (clock_gpio3 << 4); in dib0700_set_clock()
Dcxusb.c1077 .pll_range = 3,
/drivers/media/dvb-frontends/
Ddibx000_common.h121 u8 pll_range; member
Ddib0090.h19 u8 pll_range:1; member
Ddib0090.c533 …if ((PllCfg & 0x1FFF) != ((cfg->io.pll_range << 12) | (cfg->io.pll_loopdiv << 6) | (cfg->io.pll_pr… in dib0090_reset_digital()
545 …PllCfg = (1 << 15) | (0 << 13) | (cfg->io.pll_range << 12) | (cfg->io.pll_loopdiv << 6) | (cfg->io… in dib0090_reset_digital()
605 …if ((PllCfg & 0x1FFF) != ((cfg->io.pll_range << 12) | (cfg->io.pll_loopdiv << 6) | (cfg->io.pll_pr… in dib0090_fw_reset_digital()
616 …PllCfg = (1 << 15) | (0 << 13) | (cfg->io.pll_range << 12) | (cfg->io.pll_loopdiv << 6) | (cfg->io… in dib0090_fw_reset_digital()
Ddib7000m.c401 reg_910 = (((bw->pll_ratio >> 6) & 0x3) << 3) | (bw->pll_range << 1) | bw->pll_reset; in dib7000m_reset_pll()
437 (1 << 3) | (bw->pll_range << 1) | (bw->pll_reset << 0); in dib7000mc_reset_pll()
Ddib7000p.c453 …dib7000p_write_word(state, 1856, (!bw->pll_reset << 13) | (bw->pll_range << 12) | (bw->pll_ratio <… in dib7000p_reset_pll()
467 …903, (bw->pll_prediv << 5) | (((bw->pll_ratio >> 6) & 0x3) << 3) | (bw->pll_range << 1) | bw->pll_… in dib7000p_reset_pll()
Ddib8000.c704 (1 << 3) | (pll->pll_range << 1) | in dib8000_reset_pll()
730 (pll->pll_range<<12) | (pll->pll_ratio<<6) | in dib8000_reset_pll()
/drivers/media/pci/cx23885/
Dcx23885-dvb.c1043 .pll_range = 3,