Home
last modified time | relevance | path

Searched refs:post_div_mask (Results 1 – 13 of 13) sorted by relevance

/drivers/clk/qcom/
Dclk-pll.h70 u32 post_div_mask; member
Dclk-alpha-pll.h121 u32 post_div_mask; member
Dclk-cpu-8996.c108 .post_div_mask = 0x3 << 8,
150 .post_div_mask = 0x3 << 8,
Dlcc-ipq806x.c51 .post_div_mask = BIT(21) | BIT(20),
Dclk-pll.c237 mask |= config->post_div_mask; in clk_pll_configure()
Dclk-alpha-pll.c241 mask |= config->post_div_mask; in clk_alpha_pll_configure()
1036 if (config->post_div_mask) { in clk_fabia_pll_configure()
1037 mask = config->post_div_mask; in clk_fabia_pll_configure()
Dmmcc-msm8974.c2304 .post_div_mask = 0x3 << 8,
2318 .post_div_mask = 0x3 << 8,
Dmmcc-apq8084.c3037 .post_div_mask = 0x3 << 8,
3051 .post_div_mask = 0x3 << 8,
Dgcc-msm8939.c218 .post_div_mask = BIT(9) | BIT(8),
265 .post_div_mask = BIT(9) | BIT(8),
Dgcc-ipq8074.c4396 .post_div_mask = GENMASK(9, 8),
4408 .post_div_mask = GENMASK(11, 8),
Dgcc-ipq6018.c4156 .post_div_mask = GENMASK(9, 8),
4168 .post_div_mask = GENMASK(11, 8),
Dgcc-qcs404.c342 .post_div_mask = 0xf << 8,
Dmmcc-msm8960.c149 .post_div_mask = 0x3 << 20,