Searched refs:pstate_latency_us (Results 1 – 5 of 5) sorted by relevance
/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/ |
D | rn_clk_mgr.c | 589 .pstate_latency_us = 11.72, 597 .pstate_latency_us = 11.72, 605 .pstate_latency_us = 11.72, 613 .pstate_latency_us = 11.72, 626 .pstate_latency_us = 11.65333, 634 .pstate_latency_us = 11.65333, 642 .pstate_latency_us = 11.65333, 650 .pstate_latency_us = 11.65333, 663 .pstate_latency_us = 11.65333, 671 .pstate_latency_us = 11.65333, [all …]
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/drivers/gpu/drm/amd/display/dc/inc/hw/ |
D | clk_mgr.h | 94 double pstate_latency_us; member 114 double pstate_latency_us; member
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/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/ |
D | dcn30_clk_mgr.c | 110 double pstate_latency_us = clk_mgr->base.ctx->dc->dml.soc.dram_clock_change_latency_us; in dcn3_build_wm_range_table() local 117 clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us = pstate_latency_us; in dcn3_build_wm_range_table() 139 …clk_mgr->base.bw_params->wm_table.nv_entries[WM_C].dml_input.pstate_latency_us = clk_mgr->base.ctx… in dcn3_build_wm_range_table()
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/drivers/gpu/drm/amd/display/dc/dcn21/ |
D | dcn21_resource.c | 1041 dml->soc.dram_clock_change_latency_us = table_entry->pstate_latency_us; in calculate_wm_set_for_vlevel() 1081 dc->clk_mgr->bw_params->wm_table.entries[i].pstate_latency_us = in patch_bounding_box()
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/drivers/gpu/drm/amd/display/dc/dcn30/ |
D | dcn30_resource.c | 2232 …_change_latency_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_B].dml_input.pstate_latency_us; in dcn30_calculate_wm_and_dlg() 2315 …_change_latency_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us; in dcn30_calculate_wm_and_dlg() 2358 dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us; in dcn30_calculate_wm_and_dlg()
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