| /drivers/input/touchscreen/ |
| D | max11801_ts.c | 83 static u8 read_register(struct i2c_client *client, int addr) in read_register() function
104 status = read_register(data->client, GENERNAL_STATUS_REG); in max11801_ts_interrupt()
107 status = read_register(data->client, GENERNAL_STATUS_REG); in max11801_ts_interrupt()
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| /drivers/media/dvb-frontends/ |
| D | mxl5xx.c | 249 static int read_register(struct mxl *state, u32 reg, u32 *val) in read_register() function
302 stat = read_register(state, reg, &data); in read_by_mnemonic()
319 stat = read_register(state, reg, &data); in update_by_mnemonic()
332 if (read_register(state, HYDRA_HEAR_BEAT, &hb0)) in firmware_is_alive()
335 if (read_register(state, HYDRA_HEAR_BEAT, &hb1)) in firmware_is_alive()
530 stat = read_register(state, (HYDRA_DMD_SNR_ADDR_OFFSET + in read_snr()
607 stat = read_register(state, (HYDRA_DMD_STATUS_INPUT_POWER_ADDR + in read_signal_strength()
627 read_register(state, (HYDRA_DMD_LOCK_STATUS_ADDR_OFFSET + in read_status()
1005 status = read_register(state, HYDRA_PRCM_ROOT_CLK_REG, ®_data); in firmware_download()
1329 read_register(state, 0x90000194, &val); in set_drive_strength()
[all …]
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| /drivers/gpu/drm/amd/include/ |
| D | cgs_common.h | 142 cgs_read_register_t read_register; member
166 CGS_CALL(read_register,dev,offset)
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| /drivers/mailbox/ |
| D | pcc.c | 99 static int read_register(void __iomem *vaddr, u64 *val, unsigned int bit_width) in read_register() function
200 ret = read_register(pcc_doorbell_ack_vaddr[id], in pcc_mbox_irq()
345 ret = read_register(pcc_doorbell_vaddr[id], &doorbell_val, in pcc_send_data()
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| /drivers/net/wireless/intel/ipw2x00/ |
| D | ipw2100.c | 330 static inline void read_register(struct net_device *dev, u32 reg, u32 * val) in read_register() function
383 read_register(dev, IPW_REG_INDIRECT_ACCESS_DATA, val); in read_nic_dword()
498 read_register(dev, IPW_REG_AUTOINCREMENT_DATA, (u32 *) buf); in read_nic_memory()
511 read_register(dev, IPW_REG_DOA_DEBUG_AREA_START, &dbg); in ipw2100_hw_is_adapter_in_system()
843 read_register(priv->net_dev, address, &data1); in ipw2100_verify()
855 read_register(priv->net_dev, IPW_REG_DOMAIN_1_OFFSET + 0x32, in ipw2100_verify()
857 read_register(priv->net_dev, IPW_REG_DOMAIN_1_OFFSET + 0x36, in ipw2100_verify()
933 read_register(priv->net_dev, IPW_REG_RESET_REG, &r); in sw_reset_and_clock()
951 read_register(priv->net_dev, IPW_REG_GP_CNTRL, &r); in sw_reset_and_clock()
960 read_register(priv->net_dev, IPW_REG_GP_CNTRL, &r); in sw_reset_and_clock()
[all …]
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| /drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_cgs.c | 479 .read_register = amdgpu_cgs_read_register,
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| D | amdgpu.h | 591 int (*read_register)(struct amdgpu_device *adev, u32 se_num, member
1158 #define amdgpu_asic_read_register(adev, se, sh, offset, v)((adev)->asic_funcs->read_register((adev)…
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| D | soc15.c | 1009 .read_register = &soc15_read_register,
1032 .read_register = &soc15_read_register,
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| D | nv.c | 680 .read_register = &nv_read_register,
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| D | cik.c | 1918 .read_register = &cik_read_register,
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| D | vi.c | 1086 .read_register = &vi_read_register,
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| D | si.c | 1882 .read_register = &si_read_register,
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