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Searched refs:reference_clock (Results 1 – 20 of 20) sorted by relevance

/drivers/gpu/drm/radeon/
Drv740_dpm.c131 u32 reference_clock = rdev->clock.spll.reference_freq; in rv740_populate_sclk_value() local
144 do_div(tmp, reference_clock); in rv740_populate_sclk_value()
164 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); in rv740_populate_sclk_value()
251 u32 reference_clock = rdev->clock.mpll.reference_freq; in rv740_populate_mclk_value() local
257 clk_s = reference_clock * 5 / (decoded_ref * ss.rate); in rv740_populate_mclk_value()
Drv730_dpm.c51 u32 reference_clock = rdev->clock.spll.reference_freq; in rv730_populate_sclk_value() local
70 do_div(tmp, reference_clock); in rv730_populate_sclk_value()
96 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); in rv730_populate_sclk_value()
171 u32 reference_clock = rdev->clock.mpll.reference_freq; in rv730_populate_mclk_value() local
172 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); in rv730_populate_mclk_value()
Drv770_dpm.c318 u32 reference_clock, in rv770_calculate_fractional_mpll_feedback_divider() argument
336 (8 * fyclk * reference_divider * post_divider) / reference_clock; in rv770_calculate_fractional_mpll_feedback_divider()
403 u32 reference_clock = rdev->clock.mpll.reference_freq; in rv770_populate_mclk_value() local
417 rv770_calculate_fractional_mpll_feedback_divider(memory_clock, reference_clock, in rv770_populate_mclk_value()
445 reference_clock, in rv770_populate_mclk_value()
500 u32 reference_clock = rdev->clock.spll.reference_freq; in rv770_populate_sclk_value() local
518 do_div(tmp, reference_clock); in rv770_populate_sclk_value()
543 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); in rv770_populate_sclk_value()
1705 u32 reference_clock; in rv770_program_response_times() local
1719 reference_clock = radeon_get_xclk(rdev); in rv770_program_response_times()
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Dni_dpm.c1225 u32 reference_clock; in ni_program_response_times() local
1241 reference_clock = radeon_get_xclk(rdev); in ni_program_response_times()
1243 vddc_dly = (voltage_response_time * reference_clock) / 1600; in ni_program_response_times()
1244 bb_dly = (backbias_response_time * reference_clock) / 1600; in ni_program_response_times()
1245 acpi_dly = (acpi_delay_time * reference_clock) / 1600; in ni_program_response_times()
1246 vbi_dly = (vbi_time_out * reference_clock) / 1600; in ni_program_response_times()
1248 mclk_switch_limit = (460 * reference_clock) / 100; in ni_program_response_times()
2011 u32 reference_clock = rdev->clock.spll.reference_freq; in ni_calculate_sclk_params() local
2025 do_div(tmp, reference_clock); in ni_calculate_sclk_params()
2045 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); in ni_calculate_sclk_params()
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Dsi_dpm.c3628 u32 reference_clock; in si_program_response_times() local
3640 reference_clock = radeon_get_xclk(rdev); in si_program_response_times()
3642 vddc_dly = (voltage_response_time * reference_clock) / 100; in si_program_response_times()
3643 acpi_dly = (acpi_delay_time * reference_clock) / 100; in si_program_response_times()
3644 vbi_dly = (vbi_time_out * reference_clock) / 100; in si_program_response_times()
4778 u32 reference_clock = rdev->clock.spll.reference_freq; in si_calculate_sclk_params() local
4791 do_div(tmp, reference_clock); in si_calculate_sclk_params()
4811 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); in si_calculate_sclk_params()
4900 u32 reference_clock = rdev->clock.mpll.reference_freq; in si_populate_mclk_value() local
4907 tmp = freq_nom / reference_clock; in si_populate_mclk_value()
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Dcypress_dpm.c277 u32 reference_clock; in cypress_program_response_times() local
280 reference_clock = radeon_get_xclk(rdev); in cypress_program_response_times()
281 mclk_switch_limit = (460 * reference_clock) / 100; in cypress_program_response_times()
560 u32 reference_clock = rdev->clock.mpll.reference_freq; in cypress_populate_mclk_value() local
566 clk_s = reference_clock * 5 / (decoded_ref * ss.rate); in cypress_populate_mclk_value()
Drv770.c796 u32 reference_clock = rdev->clock.spll.reference_freq; in rv770_get_xclk() local
803 return reference_clock / 4; in rv770_get_xclk()
805 return reference_clock; in rv770_get_xclk()
Dci_dpm.c949 u32 reference_clock, tmp; in ci_thermal_setup_fan_table() local
995 reference_clock = radeon_get_xclk(rdev); in ci_thermal_setup_fan_table()
998 reference_clock) / 1600); in ci_thermal_setup_fan_table()
2816 u32 reference_clock = rdev->clock.mpll.reference_freq; in ci_calculate_mclk_params() local
2823 tmp = (freq_nom / reference_clock); in ci_calculate_mclk_params()
2827 u32 clks = reference_clock * 5 / ss.rate; in ci_calculate_mclk_params()
3154 u32 reference_clock = rdev->clock.spll.reference_freq; in ci_calculate_sclk_params() local
3178 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); in ci_calculate_sclk_params()
Dcik.c1716 u32 reference_clock = rdev->clock.spll.reference_freq; in cik_get_xclk() local
1720 return reference_clock / 2; in cik_get_xclk()
1723 return reference_clock / 4; in cik_get_xclk()
1725 return reference_clock; in cik_get_xclk()
Dsi.c1345 u32 reference_clock = rdev->clock.spll.reference_freq; in si_get_xclk() local
1354 return reference_clock / 4; in si_get_xclk()
1356 return reference_clock; in si_get_xclk()
/drivers/gpu/drm/amd/pm/powerplay/smumgr/
Diceland_smumgr.c805 uint32_t reference_clock; in iceland_calculate_sclk_params() local
817 reference_clock = atomctrl_get_reference_clock(hwmgr); in iceland_calculate_sclk_params()
849 uint32_t clkS = reference_clock * 5 / (reference_divider * ss_info.speed_spectrum_rate); in iceland_calculate_sclk_params()
1115 uint32_t reference_clock = atomctrl_get_mpll_reference_clock(hwmgr); in iceland_calculate_mclk_params() local
1124 tmp = (freq_nom / reference_clock); in iceland_calculate_mclk_params()
1132 uint32_t clks = reference_clock * 5 / ss_info.speed_spectrum_rate; in iceland_calculate_mclk_params()
2092 uint32_t reference_clock; in iceland_thermal_setup_fan_table() local
2147 reference_clock = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev); in iceland_thermal_setup_fan_table()
2149 …e32((hwmgr->thermal_controller.advanceFanControlParameters.ulCycleDelay * reference_clock) / 1600); in iceland_thermal_setup_fan_table()
Dtonga_smumgr.c548 uint32_t reference_clock; in tonga_calculate_sclk_params() local
560 reference_clock = atomctrl_get_reference_clock(hwmgr); in tonga_calculate_sclk_params()
592 uint32_t clkS = reference_clock * 5 / (reference_divider * ss_info.speed_spectrum_rate); in tonga_calculate_sclk_params()
867 uint32_t reference_clock = atomctrl_get_mpll_reference_clock(hwmgr); in tonga_calculate_mclk_params() local
876 tmp = (freq_nom / reference_clock); in tonga_calculate_mclk_params()
884 uint32_t clks = reference_clock * 5 / ss_info.speed_spectrum_rate; in tonga_calculate_mclk_params()
2468 uint32_t reference_clock; in tonga_thermal_setup_fan_table() local
2532 reference_clock = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev); in tonga_thermal_setup_fan_table()
2534 …e32((hwmgr->thermal_controller.advanceFanControlParameters.ulCycleDelay * reference_clock) / 1600); in tonga_thermal_setup_fan_table()
Dci_smumgr.c1073 uint32_t reference_clock = atomctrl_get_mpll_reference_clock(hwmgr); in ci_calculate_mclk_params() local
1082 tmp = (freq_nom / reference_clock); in ci_calculate_mclk_params()
1086 uint32_t clks = reference_clock * 5 / ss_info.speed_spectrum_rate; in ci_calculate_mclk_params()
2131 uint32_t reference_clock; in ci_thermal_setup_fan_table() local
2186 reference_clock = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev); in ci_thermal_setup_fan_table()
2188 …e32((hwmgr->thermal_controller.advanceFanControlParameters.ulCycleDelay * reference_clock) / 1600); in ci_thermal_setup_fan_table()
Dfiji_smumgr.c2138 uint32_t reference_clock; in fiji_thermal_setup_fan_table() local
2202 reference_clock = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev); in fiji_thermal_setup_fan_table()
2206 reference_clock) / 1600); in fiji_thermal_setup_fan_table()
Dpolaris10_smumgr.c2074 uint32_t reference_clock; in polaris10_thermal_setup_fan_table() local
2142 reference_clock = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev); in polaris10_thermal_setup_fan_table()
2146 reference_clock) / 1600); in polaris10_thermal_setup_fan_table()
/drivers/gpu/drm/amd/amdgpu/
Dcik.c843 u32 reference_clock = adev->clock.spll.reference_freq; in cik_get_xclk() local
847 return reference_clock / 2; in cik_get_xclk()
850 return reference_clock / 4; in cik_get_xclk()
852 return reference_clock; in cik_get_xclk()
Dvi.c329 u32 reference_clock = adev->clock.spll.reference_freq; in vi_get_xclk() local
338 return reference_clock; in vi_get_xclk()
348 return reference_clock / 4; in vi_get_xclk()
350 return reference_clock; in vi_get_xclk()
Dsoc15.c247 u32 reference_clock = adev->clock.spll.reference_freq; in soc15_get_xclk() local
252 return reference_clock / 4; in soc15_get_xclk()
254 return reference_clock; in soc15_get_xclk()
Dsi.c1353 u32 reference_clock = adev->clock.spll.reference_freq; in si_get_xclk() local
1362 return reference_clock / 4; in si_get_xclk()
1364 return reference_clock; in si_get_xclk()
/drivers/gpu/drm/amd/pm/powerplay/
Dsi_dpm.c4084 u32 reference_clock; in si_program_response_times() local
4096 reference_clock = amdgpu_asic_get_xclk(adev); in si_program_response_times()
4098 vddc_dly = (voltage_response_time * reference_clock) / 100; in si_program_response_times()
4099 acpi_dly = (acpi_delay_time * reference_clock) / 100; in si_program_response_times()
4100 vbi_dly = (vbi_time_out * reference_clock) / 100; in si_program_response_times()
5237 u32 reference_clock = adev->clock.spll.reference_freq; in si_calculate_sclk_params() local
5250 do_div(tmp, reference_clock); in si_calculate_sclk_params()
5270 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); in si_calculate_sclk_params()
5359 u32 reference_clock = adev->clock.mpll.reference_freq; in si_populate_mclk_value() local
5366 tmp = freq_nom / reference_clock; in si_populate_mclk_value()
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