| /drivers/firmware/efi/libstub/ |
| D | randomalloc.c | 22 u64 first_slot, last_slot, region_end; in get_entry_num_slots() local
31 region_end = min(md->phys_addr + md->num_pages * EFI_PAGE_SIZE - 1, in get_entry_num_slots()
33 if (region_end < size) in get_entry_num_slots()
37 last_slot = round_down(region_end - size + 1, align); in get_entry_num_slots()
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| /drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_cm_common.c | 109 reg_region_cur <= reg->region_end; in cm_helper_program_xfer_func()
321 int32_t region_start, region_end; in cm_helper_translate_curve_to_hw_format() local
343 region_end = NUMBER_REGIONS - MAX_LOW_POINT; in cm_helper_translate_curve_to_hw_format()
362 region_end = 1; in cm_helper_translate_curve_to_hw_format()
365 for (i = region_end - region_start; i < MAX_REGIONS_NUMBER ; i++) in cm_helper_translate_curve_to_hw_format()
374 for (k = 0; k < (region_end - region_start); k++) { in cm_helper_translate_curve_to_hw_format()
390 start_index = (region_end + MAX_LOW_POINT) * NUMBER_SW_SEGMENTS; in cm_helper_translate_curve_to_hw_format()
406 dc_fixpt_from_int(region_end)); in cm_helper_translate_curve_to_hw_format()
518 int32_t region_start, region_end; in cm_helper_translate_curve_to_degamma_hw_format() local
533 region_end = 0; in cm_helper_translate_curve_to_degamma_hw_format()
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| D | dcn10_dpp_cm.c | 386 gam_regs.region_end = REG(CM_RGAM_RAMA_REGION_32_33); in dpp1_cm_program_regamma_luta_settings()
415 gam_regs.region_end = REG(CM_RGAM_RAMB_REGION_32_33); in dpp1_cm_program_regamma_lutb_settings()
539 gam_regs.region_end = REG(CM_DGAM_RAMB_REGION_14_15); in dpp1_program_degamma_lutb_settings()
568 gam_regs.region_end = REG(CM_DGAM_RAMA_REGION_14_15); in dpp1_program_degamma_luta_settings()
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| D | dcn10_cm_common.h | 55 uint32_t region_end
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| /drivers/gpu/drm/amd/display/dc/dcn30/ |
| D | dcn30_cm_common.c | 86 reg_region_cur <= reg->region_end; in cm_helper_program_gamcor_xfer_func()
119 int32_t region_start, region_end; in cm3_helper_translate_curve_to_hw_format() local
142 region_end = NUMBER_REGIONS - MAX_LOW_POINT; in cm3_helper_translate_curve_to_hw_format()
161 region_end = 1; in cm3_helper_translate_curve_to_hw_format()
164 for (i = region_end - region_start; i < MAX_REGIONS_NUMBER ; i++) in cm3_helper_translate_curve_to_hw_format()
173 for (k = 0; k < (region_end - region_start); k++) { in cm3_helper_translate_curve_to_hw_format()
189 start_index = (region_end + MAX_LOW_POINT) * NUMBER_SW_SEGMENTS; in cm3_helper_translate_curve_to_hw_format()
205 dc_fixpt_from_int(region_end)); in cm3_helper_translate_curve_to_hw_format()
318 int32_t region_start, region_end; in cm3_helper_translate_curve_to_degamma_hw_format() local
333 region_end = 0; in cm3_helper_translate_curve_to_degamma_hw_format()
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| D | dcn30_dwb_cm.c | 108 gam_regs.region_end = REG(DWB_OGAM_RAMA_REGION_32_33); in dwb3_program_ogam_luta_settings()
141 gam_regs.region_end = REG(DWB_OGAM_RAMB_REGION_32_33); in dwb3_program_ogam_lutb_settings()
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| D | dcn30_dpp_cm.c | 260 gam_regs.region_end = REG(CM_GAMCOR_RAMB_REGION_32_33); in dpp3_program_gamcor_lut()
282 gam_regs.region_end = REG(CM_GAMCOR_RAMA_REGION_32_33); in dpp3_program_gamcor_lut()
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| D | dcn30_dpp.c | 607 gam_regs.region_end = REG(CM_BLNDGAM_RAMA_REGION_32_33); in dpp3_program_blnd_luta_settings()
635 gam_regs.region_end = REG(CM_BLNDGAM_RAMB_REGION_32_33); in dpp3_program_blnd_lutb_settings()
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| D | dcn30_mpc.c | 218 gam_regs.region_end = REG(MPCC_OGAM_RAMA_REGION_32_33[mpcc_id]); in mpc3_program_luta()
251 gam_regs.region_end = REG(MPCC_OGAM_RAMB_REGION_32_33[mpcc_id]); in mpc3_program_lutb()
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| /drivers/mtd/parsers/ |
| D | afs.c | 294 u32 region_end; in afs_parse_v2_partition() local
304 region_end = region_start + region_size; in afs_parse_v2_partition()
306 region_end += (mtd->erasesize - 1); in afs_parse_v2_partition()
307 region_end &= ~(mtd->erasesize -1); in afs_parse_v2_partition()
309 region_start, region_end); in afs_parse_v2_partition()
316 part->size = region_end - region_start; in afs_parse_v2_partition()
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| /drivers/nvdimm/ |
| D | region_devs.c | 1293 resource_size_t res_end, region_end, region_start; in region_conflict() local
1304 region_end = region_start + nd_region->ndr_size; in region_conflict()
1305 if (ctx->start >= region_start && ctx->start < region_end) in region_conflict()
1307 if (res_end > region_start && res_end <= region_end) in region_conflict()
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| /drivers/mtd/spi-nor/ |
| D | core.c | 1285 u64 region_end = region_start + region->size; in spi_nor_find_erase_region() local
1287 while (addr < region_start || addr >= region_end) { in spi_nor_find_erase_region()
1293 region_end = region_start + region->size; in spi_nor_find_erase_region()
1364 u64 region_end; in spi_nor_init_erase_cmd_list() local
1371 region_end = spi_nor_region_end(region); in spi_nor_init_erase_cmd_list()
1395 if (len && addr >= region_end) { in spi_nor_init_erase_cmd_list()
1399 region_end = spi_nor_region_end(region); in spi_nor_init_erase_cmd_list()
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| /drivers/gpu/drm/amd/display/dc/dcn20/ |
| D | dcn20_mpc.c | 344 gam_regs.region_end = REG(MPCC_OGAM_RAMB_REGION_32_33[mpcc_id]); in mpc2_program_lutb()
371 gam_regs.region_end = REG(MPCC_OGAM_RAMA_REGION_32_33[mpcc_id]); in mpc2_program_luta()
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| D | dcn20_dpp_cm.c | 408 gam_regs.region_end = REG(CM_BLNDGAM_RAMA_REGION_32_33); in dpp20_program_blnd_luta_settings()
436 gam_regs.region_end = REG(CM_BLNDGAM_RAMB_REGION_32_33); in dpp20_program_blnd_lutb_settings()
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| /drivers/gpu/drm/amd/display/dc/dce110/ |
| D | dce110_hw_sequencer.c | 445 int32_t region_start, region_end; in dce110_translate_regamma_to_hw_format() local
462 region_end = region_start + NUMBER_REGIONS; in dce110_translate_regamma_to_hw_format()
475 region_end = 1; in dce110_translate_regamma_to_hw_format()
501 for (k = 0; k < (region_end - region_start); k++) { in dce110_translate_regamma_to_hw_format()
517 start_index = (region_end + MAX_LOW_POINT) * NUMBER_SW_SEGMENTS; in dce110_translate_regamma_to_hw_format()
525 dc_fixpt_from_int(region_end)); in dce110_translate_regamma_to_hw_format()
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| /drivers/md/ |
| D | dm-clone-target.c | 801 unsigned long region_start, region_end; in hydration_copy() local
811 region_end = region_start + nr_regions - 1; in hydration_copy()
815 if (region_end == clone->nr_regions - 1) { in hydration_copy()
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| /drivers/mtd/nand/onenand/ |
| D | onenand_base.c | 2272 loff_t region_end = 0; in onenand_block_by_block_erase() local
2277 region_end = region->offset + region->erasesize * region->numblocks; in onenand_block_by_block_erase()
2308 if (region && addr == region_end) { in onenand_block_by_block_erase()
2314 region_end = region->offset + region->erasesize * region->numblocks; in onenand_block_by_block_erase()
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| /drivers/firewire/ |
| D | core-cdev.c | 776 region.end = a->region_end; in ioctl_allocate()
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