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Searched refs:ring_enc (Results 1 – 12 of 12) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Duvd_v7_0.c89 if (ring == &adev->uvd.inst[ring->me].ring_enc[0]) in uvd_v7_0_enc_ring_get_rptr()
123 if (ring == &adev->uvd.inst[ring->me].ring_enc[0]) in uvd_v7_0_enc_ring_get_wptr()
161 if (ring == &adev->uvd.inst[ring->me].ring_enc[0]) in uvd_v7_0_enc_ring_set_wptr()
463 ring = &adev->uvd.inst[j].ring_enc[i]; in uvd_v7_0_sw_init()
514 amdgpu_ring_fini(&adev->uvd.inst[j].ring_enc[i]); in uvd_v7_0_sw_fini()
584 ring = &adev->uvd.inst[j].ring_enc[i]; in uvd_v7_0_hw_init()
737 WDOORBELL32(adev->uvd.inst[i].ring_enc[0].doorbell_index, 0); in uvd_v7_0_mmsch_start()
738 adev->wb.wb[adev->uvd.inst[i].ring_enc[0].wptr_offs] = 0; in uvd_v7_0_mmsch_start()
739 adev->uvd.inst[i].ring_enc[0].wptr = 0; in uvd_v7_0_mmsch_start()
740 adev->uvd.inst[i].ring_enc[0].wptr_old = 0; in uvd_v7_0_mmsch_start()
[all …]
Dvcn_v2_5.c198 ring = &adev->vcn.inst[j].ring_enc[i]; in vcn_v2_5_sw_init()
285 adev->vcn.inst[j].ring_enc[0].sched.ready = true; in vcn_v2_5_hw_init()
286 adev->vcn.inst[j].ring_enc[1].sched.ready = false; in vcn_v2_5_hw_init()
287 adev->vcn.inst[j].ring_enc[2].sched.ready = false; in vcn_v2_5_hw_init()
301 ring = &adev->vcn.inst[j].ring_enc[i]; in vcn_v2_5_hw_init()
1087 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v2_5_start()
1096 ring = &adev->vcn.inst[i].ring_enc[1]; in vcn_v2_5_start()
1257 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v2_5_sriov_start()
1437 ring = &adev->vcn.inst[inst_idx].ring_enc[0]; in vcn_v2_5_pause_dpg_mode()
1447 ring = &adev->vcn.inst[inst_idx].ring_enc[1]; in vcn_v2_5_pause_dpg_mode()
[all …]
Duvd_v6_0.c95 if (ring == &adev->uvd.inst->ring_enc[0]) in uvd_v6_0_enc_ring_get_rptr()
125 if (ring == &adev->uvd.inst->ring_enc[0]) in uvd_v6_0_enc_ring_get_wptr()
156 if (ring == &adev->uvd.inst->ring_enc[0]) in uvd_v6_0_enc_ring_set_wptr()
412 adev->uvd.inst->ring_enc[i].funcs = NULL; in uvd_v6_0_sw_init()
433 ring = &adev->uvd.inst->ring_enc[i]; in uvd_v6_0_sw_init()
459 amdgpu_ring_fini(&adev->uvd.inst->ring_enc[i]); in uvd_v6_0_sw_fini()
516 ring = &adev->uvd.inst->ring_enc[i]; in uvd_v6_0_hw_init()
844 ring = &adev->uvd.inst->ring_enc[0]; in uvd_v6_0_start()
851 ring = &adev->uvd.inst->ring_enc[1]; in uvd_v6_0_start()
1232 amdgpu_fence_process(&adev->uvd.inst->ring_enc[0]); in uvd_v6_0_process_interrupt()
[all …]
Dvcn_v2_0.c163 ring = &adev->vcn.inst->ring_enc[i]; in vcn_v2_0_sw_init()
244 ring = &adev->vcn.inst->ring_enc[i]; in vcn_v2_0_hw_init()
1084 ring = &adev->vcn.inst->ring_enc[0]; in vcn_v2_0_start()
1093 ring = &adev->vcn.inst->ring_enc[1]; in vcn_v2_0_start()
1235 ring = &adev->vcn.inst->ring_enc[0]; in vcn_v2_0_pause_dpg_mode()
1245 ring = &adev->vcn.inst->ring_enc[1]; in vcn_v2_0_pause_dpg_mode()
1547 if (ring == &adev->vcn.inst->ring_enc[0]) in vcn_v2_0_enc_ring_get_rptr()
1564 if (ring == &adev->vcn.inst->ring_enc[0]) { in vcn_v2_0_enc_ring_get_wptr()
1588 if (ring == &adev->vcn.inst->ring_enc[0]) { in vcn_v2_0_enc_ring_set_wptr()
1700 amdgpu_fence_process(&adev->vcn.inst->ring_enc[0]); in vcn_v2_0_process_interrupt()
[all …]
Dvcn_v1_0.c149 ring = &adev->vcn.inst->ring_enc[i]; in vcn_v1_0_sw_init()
205 ring = &adev->vcn.inst->ring_enc[i]; in vcn_v1_0_hw_init()
943 ring = &adev->vcn.inst->ring_enc[0]; in vcn_v1_0_start_spg_mode()
950 ring = &adev->vcn.inst->ring_enc[1]; in vcn_v1_0_start_spg_mode()
1245 ring = &adev->vcn.inst->ring_enc[0]; in vcn_v1_0_pause_dpg_mode()
1252 ring = &adev->vcn.inst->ring_enc[1]; in vcn_v1_0_pause_dpg_mode()
1587 if (ring == &adev->vcn.inst->ring_enc[0]) in vcn_v1_0_enc_ring_get_rptr()
1604 if (ring == &adev->vcn.inst->ring_enc[0]) in vcn_v1_0_enc_ring_get_wptr()
1621 if (ring == &adev->vcn.inst->ring_enc[0]) in vcn_v1_0_enc_ring_set_wptr()
1726 amdgpu_fence_process(&adev->vcn.inst->ring_enc[0]); in vcn_v1_0_process_interrupt()
[all …]
Dvcn_v3_0.c216 ring = &adev->vcn.inst[i].ring_enc[j]; in vcn_v3_0_sw_init()
300 ring = &adev->vcn.inst[i].ring_enc[j]; in vcn_v3_0_hw_init()
322 ring = &adev->vcn.inst[i].ring_enc[j]; in vcn_v3_0_hw_init()
1197 ring = &adev->vcn.inst[i].ring_enc[0]; in vcn_v3_0_start()
1204 ring = &adev->vcn.inst[i].ring_enc[1]; in vcn_v3_0_start()
1331 ring = &adev->vcn.inst[i].ring_enc[j]; in vcn_v3_0_start_sriov()
1570 ring = &adev->vcn.inst[inst_idx].ring_enc[0]; in vcn_v3_0_pause_dpg_mode()
1578 ring = &adev->vcn.inst[inst_idx].ring_enc[1]; in vcn_v3_0_pause_dpg_mode()
1695 if (ring == &adev->vcn.inst[ring->me].ring_enc[0]) in vcn_v3_0_enc_ring_get_rptr()
1712 if (ring == &adev->vcn.inst[ring->me].ring_enc[0]) { in vcn_v3_0_enc_ring_get_wptr()
[all …]
Damdgpu_uvd.h46 struct amdgpu_ring ring_enc[AMDGPU_MAX_UVD_ENC_RINGS]; member
Damdgpu_vcn.c243 amdgpu_ring_fini(&adev->vcn.inst[j].ring_enc[i]); in amdgpu_vcn_sw_fini()
328 fence[j] += amdgpu_fence_count_emitted(&adev->vcn.inst[j].ring_enc[i]); in amdgpu_vcn_idle_work_handler()
377 fences += amdgpu_fence_count_emitted(&adev->vcn.inst[ring->me].ring_enc[i]); in amdgpu_vcn_ring_begin_use()
Damdgpu_vcn.h198 struct amdgpu_ring ring_enc[AMDGPU_VCN_MAX_ENC_RINGS]; member
Damdgpu_uvd.c343 amdgpu_ring_fini(&adev->uvd.inst[j].ring_enc[i]); in amdgpu_uvd_sw_fini()
1230 fences += amdgpu_fence_count_emitted(&adev->uvd.inst[i].ring_enc[j]); in amdgpu_uvd_idle_work_handler()
Djpeg_v1_0.c603 if (amdgpu_fence_wait_empty(&adev->vcn.inst->ring_enc[cnt])) in jpeg_v1_0_ring_begin_use()
Damdgpu_kms.c399 if (adev->uvd.inst[i].ring_enc[j].sched.ready) in amdgpu_hw_ip_info()
424 if (adev->vcn.inst[i].ring_enc[j].sched.ready) in amdgpu_hw_ip_info()