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Searched refs:sel_clk (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/armada/
Darmada_510.c16 struct clk *sel_clk; member
124 v->sel_clk = res.clk; in armada510_crtc_compute_clock()
146 if (!dcrtc->clk && v->sel_clk) { in armada510_crtc_enable()
147 if (!WARN_ON(clk_prepare_enable(v->sel_clk))) in armada510_crtc_enable()
148 dcrtc->clk = v->sel_clk; in armada510_crtc_enable()
/drivers/gpu/drm/nouveau/dispnv04/
Ddfp.c218 state->sel_clk |= bits1618; in nv04_dfp_prepare_sel_clk()
220 state->sel_clk &= ~bits1618; in nv04_dfp_prepare_sel_clk()
237 if (nv_encoder->dcb->type == DCB_OUTPUT_LVDS && nv04_display(dev)->saved_reg.sel_clk & 0xf0) { in nv04_dfp_prepare_sel_clk()
238 int shift = (nv04_display(dev)->saved_reg.sel_clk & 0x50) ? 0 : 1; in nv04_dfp_prepare_sel_clk()
240 state->sel_clk &= ~0xf0; in nv04_dfp_prepare_sel_clk()
241 state->sel_clk |= (head ? 0x40 : 0x10) << shift; in nv04_dfp_prepare_sel_clk()
555 nv04_display(dev)->mode_reg.sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK); in nv04_lvds_dpms()
556 nv04_display(dev)->mode_reg.sel_clk &= ~0xf0; in nv04_lvds_dpms()
558 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, nv04_display(dev)->mode_reg.sel_clk); in nv04_lvds_dpms()
Ddisp.h78 uint32_t sel_clk; member
Dcrtc.c659 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, nv04_display(dev)->mode_reg.sel_clk); in nv_crtc_mode_set()
680 state->sel_clk = saved->sel_clk & ~(0x5 << 16); in nv_crtc_save()
Dhw.c405 state->sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK); in nv_save_state_ramdac()
482 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, state->sel_clk); in nv_load_state_ramdac()
/drivers/spi/
Dspi-mt65xx.c100 struct clk *parent_clk, *sel_clk, *spi_clk; member
726 mdata->sel_clk = devm_clk_get(&pdev->dev, "sel-clk"); in mtk_spi_probe()
727 if (IS_ERR(mdata->sel_clk)) { in mtk_spi_probe()
728 ret = PTR_ERR(mdata->sel_clk); in mtk_spi_probe()
746 ret = clk_set_parent(mdata->sel_clk, mdata->parent_clk); in mtk_spi_probe()
/drivers/gpu/drm/nouveau/nvkm/subdev/bios/
Dpll.c390 u32 sel_clk = nvkm_rd32(device, 0x680524); in nvbios_pll_parse() local
391 if ((info->reg == 0x680508 && sel_clk & 0x20) || in nvbios_pll_parse()
392 (info->reg == 0x680520 && sel_clk & 0x80)) { in nvbios_pll_parse()
/drivers/gpu/drm/nouveau/
Dnouveau_bios.c219 uint32_t sel_clk_binding, sel_clk; in call_lvds_script() local
248 sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK) & ~0x50000; in call_lvds_script()
249 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, sel_clk | sel_clk_binding); in call_lvds_script()
640 uint32_t sel_clk_binding, sel_clk; in run_tmds_table() local
672 sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK) & ~0x50000; in run_tmds_table()
673 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, sel_clk | sel_clk_binding); in run_tmds_table()
/drivers/gpu/drm/i2c/
Dtda998x_drv.c1443 u8 reg, div, rep, sel_clk; in tda998x_bridge_mode_set() local
1521 sel_clk = SEL_CLK_ENA_SC_CLK | SEL_CLK_SEL_CLK1 | in tda998x_bridge_mode_set()
1566 reg_write(priv, REG_SEL_CLK, sel_clk); in tda998x_bridge_mode_set()