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Searched refs:timer1 (Results 1 – 6 of 6) sorted by relevance

/drivers/clocksource/
Dtimer-zevio.c51 void __iomem *timer1, *timer2; member
67 writel(delta, timer->timer1 + IO_CURRENT_VAL); in zevio_timer_set_event()
69 timer->timer1 + IO_CONTROL); in zevio_timer_set_event()
83 writel(CNTL_STOP_TIMER, timer->timer1 + IO_CONTROL); in zevio_timer_shutdown()
108 writel(CNTL_STOP_TIMER, timer->timer1 + IO_CONTROL); in zevio_timer_interrupt()
131 timer->timer1 = timer->base + IO_TIMER1; in zevio_timer_add()
164 writel(CNTL_STOP_TIMER, timer->timer1 + IO_CONTROL); in zevio_timer_add()
165 writel(0, timer->timer1 + IO_DIVIDER); in zevio_timer_add()
/drivers/net/wireless/ath/ath5k/
Dpcu.c650 u32 timer1, timer2, timer3; in ath5k_hw_init_beacon_timers() local
663 timer1 = 0xffffffff; in ath5k_hw_init_beacon_timers()
666 timer1 = 0x0000ffff; in ath5k_hw_init_beacon_timers()
679 timer1 = (next_beacon - AR5K_TUNE_DMA_BEACON_RESP) << 3; in ath5k_hw_init_beacon_timers()
698 ath5k_hw_reg_write(ah, timer1, AR5K_TIMER1); in ath5k_hw_init_beacon_timers()
/drivers/clk/davinci/
Dpsc-dm644x.c57 LPSC(28, 0, timer1, pll1_auxclk, NULL, 0),
Dpsc-dm646x.c59 LPSC(35, 0, timer1, pll1_sysclk3, NULL, 0),
Dpsc-dm355.c63 LPSC(28, 0, timer1, pll1_auxclk, NULL, 0),
Dpsc-dm365.c64 LPSC(28, 0, timer1, pll1_auxclk, NULL, 0),