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Searched refs:tmp2 (Results 1 – 25 of 59) sorted by relevance

123

/drivers/media/common/b2c2/
Dflexcop-sram.c240 u8 tmp1, tmp2;
246 tmp2 = 0xa5;
249 sram_write(adapter, addr, &tmp2, 1);
252 tmp2 = 0;
255 sram_read(adapter, addr, &tmp2, 1);
256 sram_read(adapter, addr, &tmp2, 1);
258 dprintk("%s: wrote 0xa5, read 0x%2x\n", __func__, tmp2);
260 if (tmp2 != 0xa5)
263 tmp2 = 0x5a;
266 sram_write(adapter, addr, &tmp2, 1);
[all …]
/drivers/media/dvb-frontends/
Dec100.c80 u8 tmp, tmp2; in ec100_set_frontend() local
110 tmp2 = 0x55; in ec100_set_frontend()
114 tmp2 = 0x64; in ec100_set_frontend()
119 tmp2 = 0x72; in ec100_set_frontend()
125 ret = ec100_write_reg(state, 0x1c, tmp2); in ec100_set_frontend()
203 u8 tmp, tmp2; in ec100_read_ber() local
211 ret = ec100_read_reg(state, 0x66, &tmp2); in ec100_read_ber()
215 ber2 = (tmp2 << 8) | tmp; in ec100_read_ber()
Dtda1004x.c1126 int tmp2; in tda1004x_read_ucblocks() local
1142 tmp2 = tda1004x_read_byte(state, TDA1004X_UNCOR); in tda1004x_read_ucblocks()
1143 if (tmp2 < 0) in tda1004x_read_ucblocks()
1145 tmp2 &= 0x7f; in tda1004x_read_ucblocks()
1146 if ((tmp2 < tmp) || (tmp2 == 0)) in tda1004x_read_ucblocks()
/drivers/ide/
Daec62xx.c92 u8 tmp0 = 0, tmp1 = 0, tmp2 = 0; in aec6210_set_mode() local
104 tmp2 = 0x00; in aec6210_set_mode()
108 tmp2 = ((ultra_conf << (2*drive->dn)) | (tmp1 & ~(3 << (2*drive->dn)))); in aec6210_set_mode()
109 pci_write_config_byte(dev, 0x54, tmp2); in aec6210_set_mode()
119 u8 tmp1 = 0, tmp2 = 0; in aec6260_set_mode() local
133 tmp2 = ((ultra_conf << (4*unit)) | (tmp1 & ~(7 << (4*unit)))); in aec6260_set_mode()
134 pci_write_config_byte(dev, (0x44|hwif->channel), tmp2); in aec6260_set_mode()
/drivers/cpufreq/
Dgx-suspmod.c334 u8 tmp1, tmp2; in cpufreq_gx_verify() local
349 tmp_freq = gx_validate_speed(policy->min, &tmp1, &tmp2); in cpufreq_gx_verify()
355 tmp_freq = gx_validate_speed(policy->max, &tmp1, &tmp2); in cpufreq_gx_verify()
375 u8 tmp1, tmp2; in cpufreq_gx_target() local
383 tmp_freq = gx_validate_speed(target_freq, &tmp1, &tmp2); in cpufreq_gx_target()
386 tmp_freq = gx_validate_speed(tmp_freq, &tmp1, &tmp2); in cpufreq_gx_target()
390 tmp_freq = gx_validate_speed(tmp_freq, &tmp1, &tmp2); in cpufreq_gx_target()
/drivers/watchdog/
Dbooke_wdt.c63 unsigned long tmp2 = ppc_tb_freq; in period_to_sec() local
68 tmp2 = tmp2 / 5 * 2; in period_to_sec()
70 do_div(tmp, tmp2); in period_to_sec()
/drivers/net/
Dmii.c263 u32 advert2 = 0, tmp2 = 0; in mii_ethtool_sset() local
278 tmp2 = advert2 & ~(ADVERTISE_1000HALF | ADVERTISE_1000FULL); in mii_ethtool_sset()
283 tmp2 |= in mii_ethtool_sset()
289 if ((mii->supports_gmii) && (advert2 != tmp2)) in mii_ethtool_sset()
290 mii->mdio_write(dev, mii->phy_id, MII_CTRL1000, tmp2); in mii_ethtool_sset()
355 u32 advert2 = 0, tmp2 = 0; in mii_ethtool_set_link_ksettings() local
375 tmp2 = advert2 & in mii_ethtool_set_link_ksettings()
381 tmp2 |= ethtool_adv_to_mii_ctrl1000_t(advertising); in mii_ethtool_set_link_ksettings()
386 if ((mii->supports_gmii) && (advert2 != tmp2)) in mii_ethtool_set_link_ksettings()
387 mii->mdio_write(dev, mii->phy_id, MII_CTRL1000, tmp2); in mii_ethtool_set_link_ksettings()
/drivers/video/fbdev/i810/
Di810_accel.c438 u32 tmp1, tmp2; in i810fb_init_ringbuffer() local
447 tmp2 = i810_readl(IRING + 8, mmio) & ~RBUFFER_START_MASK; in i810fb_init_ringbuffer()
449 i810_writel(IRING + 8, mmio, tmp2 | tmp1); in i810fb_init_ringbuffer()
453 tmp2 = (par->iring.size - I810_PAGESIZE) & RBUFFER_SIZE_MASK; in i810fb_init_ringbuffer()
454 i810_writel(IRING + 12, mmio, tmp1 | tmp2); in i810fb_init_ringbuffer()
Di810_main.c232 u32 tmp1, tmp2; in i810_load_pll() local
236 tmp2 = i810_readl(DCLK_2D, mmio); in i810_load_pll()
237 tmp2 &= ~MN_MASK; in i810_load_pll()
238 i810_writel(DCLK_2D, mmio, tmp1 | tmp2); in i810_load_pll()
241 tmp2 = i810_readl(DCLK_0DS, mmio); in i810_load_pll()
242 tmp2 &= ~(P_OR << 16); in i810_load_pll()
243 i810_writel(DCLK_0DS, mmio, (tmp1 << 16) | tmp2); in i810_load_pll()
463 u32 tmp1, tmp2; in i810_restore_pll() local
467 tmp2 = i810_readl(DCLK_2D, mmio); in i810_restore_pll()
469 tmp2 &= MN_MASK; in i810_restore_pll()
[all …]
/drivers/net/wireless/broadcom/b43/
Dphy_lp.c202 u16 tmp, tmp2; in lpphy_baseband_rev0_1_init() local
332 tmp2 = (tmp & 0x03E0) >> 5; in lpphy_baseband_rev0_1_init()
333 tmp2 |= tmp2 << 5; in lpphy_baseband_rev0_1_init()
334 b43_phy_write(dev, B43_LPPHY_4C3, tmp2); in lpphy_baseband_rev0_1_init()
336 tmp2 = (tmp & 0x1F00) >> 8; in lpphy_baseband_rev0_1_init()
337 tmp2 |= tmp2 << 5; in lpphy_baseband_rev0_1_init()
338 b43_phy_write(dev, B43_LPPHY_4C4, tmp2); in lpphy_baseband_rev0_1_init()
340 tmp2 = tmp & 0x00FF; in lpphy_baseband_rev0_1_init()
341 tmp2 |= tmp << 8; in lpphy_baseband_rev0_1_init()
342 b43_phy_write(dev, B43_LPPHY_4C5, tmp2); in lpphy_baseband_rev0_1_init()
[all …]
/drivers/scsi/sym53c8xx_2/
Dsym_fw.c350 u32 opcode, new, old, tmp1, tmp2; in sym_fw_bind_script() local
409 tmp2 = cur[2]; in sym_fw_bind_script()
410 if ((tmp1 ^ tmp2) & 3) { in sym_fw_bind_script()
/drivers/gpu/drm/
Ddrm_modes.c231 int tmp1, tmp2; in drm_cvt_mode() local
241 tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 + in drm_cvt_mode()
243 hperiod = tmp1 * 2 / (tmp2 * vfieldrate); in drm_cvt_mode()
297 int tmp1, tmp2; in drm_cvt_mode() local
301 tmp2 = vdisplay_rnd + 2 * vmargin; in drm_cvt_mode()
302 hperiod = tmp1 / (tmp2 * vfieldrate); in drm_cvt_mode()
397 unsigned int tmp1, tmp2; in drm_gtf_mode_complex() local
446 tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) * in drm_gtf_mode_complex()
448 hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1; in drm_gtf_mode_complex()
/drivers/net/ethernet/amd/
Dam79c961a.c102 register unsigned int tmp asm("r2"), tmp2 asm("r3"); in am_writebuffer()
105 : "+r" (buf), "=&r" (tmp), "=&r" (tmp2)); in am_writebuffer()
114 : "+r" (offset), "=&r" (tmp), "=&r" (tmp2)); in am_writebuffer()
140 register unsigned int tmp asm("r2"), tmp2 asm("r3"), tmp3; in am_readbuffer()
149 : "=&r" (offset), "=&r" (buf), "=r" (tmp), "=r" (tmp2), "=r" (tmp3) in am_readbuffer()
Dsun3lance.c315 unsigned short tmp1, tmp2; in lance_probe() local
330 tmp2 = ioaddr_probe[1]; in lance_probe()
337 ioaddr_probe[1] = tmp2; in lance_probe()
/drivers/gpu/drm/amd/amdgpu/
Duvd_v4_2.c603 u32 tmp, tmp2; in uvd_v4_2_set_dcm() local
615 tmp2 = UVD_CGC_CTRL2__DYN_OCLK_RAMP_EN_MASK | in uvd_v4_2_set_dcm()
620 tmp2 = 0; in uvd_v4_2_set_dcm()
624 WREG32_UVD_CTX(ixUVD_CGC_CTRL2, tmp2); in uvd_v4_2_set_dcm()
Duvd_v3_1.c205 u32 tmp, tmp2; in uvd_v3_1_set_dcm() local
217 tmp2 = UVD_CGC_CTRL2__DYN_OCLK_RAMP_EN_MASK | in uvd_v3_1_set_dcm()
222 tmp2 = 0; in uvd_v3_1_set_dcm()
226 WREG32_UVD_CTX(ixUVD_CGC_CTRL2, tmp2); in uvd_v3_1_set_dcm()
/drivers/target/iscsi/
Discsi_target_parameters.c916 char *tmp1 = NULL, *tmp2 = NULL; in iscsi_check_valuelist_for_support() local
935 tmp2 = strchr(acceptor_values, ','); in iscsi_check_valuelist_for_support()
936 if (tmp2) in iscsi_check_valuelist_for_support()
937 *tmp2 = '\0'; in iscsi_check_valuelist_for_support()
939 if (tmp2) in iscsi_check_valuelist_for_support()
940 *tmp2 = ','; in iscsi_check_valuelist_for_support()
943 if (tmp2) in iscsi_check_valuelist_for_support()
944 *tmp2++ = ','; in iscsi_check_valuelist_for_support()
946 acceptor_values = tmp2; in iscsi_check_valuelist_for_support()
/drivers/net/ethernet/cavium/liquidio/
Drequest_manager.c772 struct list_head *tmp, *tmp2; in octeon_free_sc_done_list() local
785 list_for_each_safe(tmp, tmp2, &done_sc_list->head) { in octeon_free_sc_done_list()
811 struct list_head *tmp, *tmp2; in octeon_free_sc_zombie_list() local
819 list_for_each_safe(tmp, tmp2, &zombie_sc_list->head) { in octeon_free_sc_zombie_list()
833 struct list_head *tmp, *tmp2; in octeon_free_sc_buffer_pool() local
840 list_for_each_safe(tmp, tmp2, &oct->sc_buf_pool.head) { in octeon_free_sc_buffer_pool()
Docteon_droq.c746 struct list_head *tmp, *tmp2; in octeon_droq_process_packets() local
759 list_for_each_safe(tmp, tmp2, &droq->dispatch_list) { in octeon_droq_process_packets()
786 struct list_head *tmp, *tmp2; in octeon_droq_process_poll_pkts() local
809 list_for_each_safe(tmp, tmp2, &droq->dispatch_list) { in octeon_droq_process_poll_pkts()
/drivers/video/fbdev/aty/
Dmach64_ct.c285 u8 tmp, tmp2; in aty_set_pll_ct() local
317 tmp2 = par->clk_wr_offset << 1; in aty_set_pll_ct()
319 tmp &= ~(0x03U << tmp2); in aty_set_pll_ct()
320 tmp |= ((pll->ct.vclk_post_div & 0x03U) << tmp2); in aty_set_pll_ct()
Dradeon_pm.c1437 u32 tmp, tmp2; in radeon_pm_reset_pad_ctlr_strength() local
1446 tmp2 = INREG(PAD_CTLR_STRENGTH); in radeon_pm_reset_pad_ctlr_strength()
1447 if (tmp != tmp2) { in radeon_pm_reset_pad_ctlr_strength()
1448 tmp = tmp2; in radeon_pm_reset_pad_ctlr_strength()
2217 u32 tmp, tmp2;
2412 tmp2 = INREG(TMDS_TRANSMITTER_CNTL);
2418 OUTREG(TMDS_TRANSMITTER_CNTL, tmp2);
2494 tmp2 = INREG(FP_GEN_CNTL);
2502 tmp2 &= ~2;
2503 tmp2 |= FP_TMDS_EN;
[all …]
/drivers/crypto/caam/
Dcaampkc.c524 pdb->tmp2_dma = dma_map_single(dev, key->tmp2, q_sz, DMA_BIDIRECTIONAL); in set_rsa_priv_f2_pdb()
613 pdb->tmp2_dma = dma_map_single(dev, key->tmp2, q_sz, DMA_BIDIRECTIONAL); in set_rsa_priv_f3_pdb()
866 kfree_sensitive(key->tmp2); in caam_rsa_free_key()
999 rsa_key->tmp2 = kzalloc(raw_key->q_sz, GFP_DMA | GFP_KERNEL); in caam_rsa_set_priv_key_form()
1000 if (!rsa_key->tmp2) in caam_rsa_set_priv_key_form()
1027 kfree_sensitive(rsa_key->tmp2); in caam_rsa_set_priv_key_form()
Dcaampkc.h80 u8 *tmp2; member
/drivers/gpu/drm/amd/display/dc/dce120/
Ddce120_timing_generator.c433 uint32_t tmp2 = 0; in dce120_timing_generator_program_blanking() local
468 tmp2 = tmp1 + timing->h_addressable + in dce120_timing_generator_program_blanking()
474 CRTC_H_BLANK_START, tmp2); in dce120_timing_generator_program_blanking()
477 tmp2 = tmp1 + timing->v_addressable + timing->v_border_top + in dce120_timing_generator_program_blanking()
483 CRTC_V_BLANK_START, tmp2); in dce120_timing_generator_program_blanking()
/drivers/iio/frequency/
Dad9523.c424 long tmp1, tmp2; in ad9523_set_clock_provider() local
433 tmp2 = st->vco_out_freq[AD9523_VCO2] / freq; in ad9523_set_clock_provider()
435 tmp2 *= freq; in ad9523_set_clock_provider()
436 use_alt_clk_src = (abs(tmp1 - freq) > abs(tmp2 - freq)); in ad9523_set_clock_provider()

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