| /drivers/scsi/sym53c8xx_2/ |
| D | sym_malloc.c | 212 m_vtob_p vbp; in ___get_dma_mem_cluster() local
215 vbp = __sym_calloc(&mp0, sizeof(*vbp), "VTOB"); in ___get_dma_mem_cluster()
216 if (!vbp) in ___get_dma_mem_cluster()
219 vaddr = sym_m_get_dma_mem_cluster(mp, vbp); in ___get_dma_mem_cluster()
222 vbp->next = mp->vtob[hc]; in ___get_dma_mem_cluster()
223 mp->vtob[hc] = vbp; in ___get_dma_mem_cluster()
235 m_vtob_p *vbpp, vbp; in ___free_dma_mem_cluster() local
242 vbp = *vbpp; in ___free_dma_mem_cluster()
244 sym_m_free_dma_mem_cluster(mp, vbp); in ___free_dma_mem_cluster()
245 __sym_mfree(&mp0, vbp, sizeof(*vbp), "VTOB"); in ___free_dma_mem_cluster()
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| D | sym_hipd.h | 1193 static inline void *sym_m_get_dma_mem_cluster(m_pool_p mp, m_vtob_p vbp) in sym_m_get_dma_mem_cluster() argument
1201 vbp->vaddr = vaddr; in sym_m_get_dma_mem_cluster()
1202 vbp->baddr = baddr; in sym_m_get_dma_mem_cluster()
1207 static inline void sym_m_free_dma_mem_cluster(m_pool_p mp, m_vtob_p vbp) in sym_m_free_dma_mem_cluster() argument
1209 dma_free_coherent(mp->dev_dmat, SYM_MEM_CLUSTER_SIZE, vbp->vaddr, in sym_m_free_dma_mem_cluster()
1210 vbp->baddr); in sym_m_free_dma_mem_cluster()
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| /drivers/gpu/drm/bridge/adv7511/ |
| D | adv7533.c | 31 unsigned int hsw, hfp, hbp, vsw, vfp, vbp; in adv7511_dsi_config_timing_gen() local
39 vbp = mode->vtotal - mode->vsync_end; in adv7511_dsi_config_timing_gen()
62 regmap_write(adv->regmap_cec, 0x36, vbp >> 4); in adv7511_dsi_config_timing_gen()
63 regmap_write(adv->regmap_cec, 0x37, (vbp << 4) & 0xff); in adv7511_dsi_config_timing_gen()
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| /drivers/gpu/drm/tilcdc/ |
| D | tilcdc_crtc.c | 280 uint32_t reg, hbp, hfp, hsw, vbp, vfp, vsw; in tilcdc_crtc_set_mode() local
319 vbp = mode->vtotal - mode->vsync_end; in tilcdc_crtc_set_mode()
324 mode->hdisplay, mode->vdisplay, hbp, hfp, hsw, vbp, vfp, vsw); in tilcdc_crtc_set_mode()
353 ((vbp & 0xff) << 24) | in tilcdc_crtc_set_mode()
756 uint32_t hbp, hfp, hsw, vbp, vfp, vsw; in tilcdc_crtc_mode_valid() local
779 vbp = mode->vtotal - mode->vsync_end; in tilcdc_crtc_mode_valid()
798 if (vbp & ~0xff) { in tilcdc_crtc_mode_valid()
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| /drivers/video/fbdev/omap2/omapfb/dss/ |
| D | hdmi_wp.c | 175 timing_v |= FLD_VAL(timings->vbp, 31, 20); in hdmi_wp_video_config_timing()
195 timings->vbp = param->timings.vbp; in hdmi_wp_init_vid_fmt_timings()
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| D | display.c | 270 ovt->vbp = vm->vback_porch; in videomode_to_omap_video_timings()
303 vm->vback_porch = ovt->vbp; in omap_video_timings_to_videomode()
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| D | display-sysfs.c | 99 t.y_res, t.vfp, t.vbp, t.vsw); in display_timings_show()
124 &t.y_res, &t.vfp, &t.vbp, &t.vsw) != 9) in display_timings_store()
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| /drivers/video/fbdev/omap/ |
| D | lcd_htcherald.c | 39 .vbp = 2,
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| D | lcd_palmte.c | 31 .vbp = 7,
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| D | lcd_palmtt.c | 42 .vbp = 7,
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| D | lcd_palmz71.c | 36 .vbp = 7,
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| D | lcd_inn1510.c | 42 .vbp = 0,
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| D | lcd_osk.c | 62 .vbp = 0,
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| D | lcd_h3.c | 58 .vbp = 0,
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| D | lcd_inn1610.c | 73 .vbp = 0,
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| D | lcd_ams_delta.c | 117 .vbp = 0,
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| D | omapfb.h | 73 int vbp; /* Vertical back porch */ member
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| /drivers/gpu/drm/hisilicon/kirin/kirin/ |
| D | dw_drm_dsi.c | 366 u32 hfp, hbp, hsw, vfp, vbp, vsw; in dsi_set_mode_timing() local
396 vbp = mode->vtotal - mode->vsync_end; in dsi_set_mode_timing()
414 writel(vbp, base + VID_VBP_LINES); in dsi_set_mode_timing()
422 vtot, vfp, vbp, vsw); in dsi_set_mode_timing()
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| /drivers/gpu/drm/panel/ |
| D | panel-olimex-lcd-olinuxino.c | 35 u32 vbp; member
172 lcd_mode->vpw + lcd_mode->vbp; in lcd_olinuxino_get_modes()
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| D | panel-novatek-nt35510.c | 301 u8 vbp; member
612 dpfrctr[2] = conf->vbp; in nt35510_setup_display()
1059 .vbp = 7,
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| /drivers/gpu/drm/pl111/ |
| D | pl111_display.c | 133 u32 lpp, vsw, vfp, vbp; in pl111_display_enable() local
154 vbp = mode->vtotal - mode->vsync_end; in pl111_display_enable()
166 (vbp << 24), in pl111_display_enable()
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| /drivers/gpu/drm/exynos/ |
| D | exynos5433_drm_decon.c | 234 int vbp = m->crtc_vtotal - m->crtc_vsync_end; in decon_commit() local
238 vbp = vbp / 2 - 1; in decon_commit()
239 val = VIDTCON00_VBPD_F(vbp - 1) | VIDTCON00_VFPD_F(vfp - 1); in decon_commit()
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| /drivers/gpu/drm/hisilicon/kirin/ |
| D | kirin_drm_dpe.c | 495 u32 hfp, hbp, hsw, vfp, vbp, vsw; in dpe_dbuf_init() local
504 vbp = mode->vtotal - mode->vsync_end; in dpe_dbuf_init()
530 (1000000 / 60 / (mode->vdisplay + vbp + vfp + vsw) * in dpe_dbuf_init()
562 u32 hfp, hbp, hsw, vfp, vbp, vsw; in dpe_ldi_init() local
572 vbp = mode->vtotal - mode->vsync_end; in dpe_ldi_init()
586 writel(vfp | (vbp << 16), ldi_base + LDI_VRT_CTRL0); in dpe_ldi_init()
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| /drivers/gpu/drm/arm/display/komeda/d71/ |
| D | d71_regs.h | 418 #define BS_V_INTVALS(vfp, vbp) (((vfp) & 0x3FFF) + (((vbp) & 0xFF) << 16)) argument
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| /drivers/scsi/ |
| D | ncr53c8xx.c | 374 m_vtob_s *vbp; in ___dma_getp() local
376 vbp = __m_calloc(&mp0, sizeof(*vbp), "VTOB"); in ___dma_getp()
377 if (vbp) { in ___dma_getp()
384 vbp->vaddr = vp; in ___dma_getp()
385 vbp->baddr = daddr; in ___dma_getp()
386 vbp->next = mp->vtob[hc]; in ___dma_getp()
387 mp->vtob[hc] = vbp; in ___dma_getp()
392 if (vbp) in ___dma_getp()
393 __m_free(&mp0, vbp, sizeof(*vbp), "VTOB"); in ___dma_getp()
399 m_vtob_s **vbpp, *vbp; in ___dma_freep() local
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