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Searched refs:vld (Results 1 – 10 of 10) sorted by relevance

/drivers/infiniband/hw/hfi1/
Dpio.c92 for (i = 0; i < ARRAY_SIZE(dd->vld); i++) in pio_send_control()
93 if (!dd->vld[i].mtu) in pio_send_control()
1823 return dd->vld[0].sc; in pio_select_send_context_vl()
1830 rval = !rval ? dd->vld[0].sc : rval; in pio_select_send_context_vl()
1882 dd->vld[i].mtu, in set_threshold()
2024 dd->vld[15].sc = sc_alloc(dd, SC_VL15, in init_pervl_scs()
2026 if (!dd->vld[15].sc) in init_pervl_scs()
2029 hfi1_init_ctxt(dd->vld[15].sc); in init_pervl_scs()
2030 dd->vld[15].mtu = enum_to_mtu(OPA_MTU_2048); in init_pervl_scs()
2038 dd->kernel_send_context[0] = dd->vld[15].sc; in init_pervl_scs()
[all …]
Dqp.c332 if (wqe->length > dd->vld[15].mtu) in hfi1_setup_wqe()
612 return dd->vld[15].sc; in qp_to_send_context()
858 mtu = min_t(u32, mtu, dd->vld[vl].mtu); in mtu_from_qp()
Dmad.c825 ppd->vls_supported > ARRAY_SIZE(dd->vld)) { in __subn_get_opa_portinfo()
890 mtu = mtu_to_enum(dd->vld[i].mtu, HFI1_DEFAULT_ACTIVE_MTU); in __subn_get_opa_portinfo()
897 mtu = mtu_to_enum(dd->vld[15].mtu, 2048); in __subn_get_opa_portinfo()
1527 ppd->vls_supported > ARRAY_SIZE(dd->vld)) { in __subn_set_opa_portinfo()
1545 if (dd->vld[i].mtu != mtu) { in __subn_set_opa_portinfo()
1548 i, dd->vld[i].mtu, mtu); in __subn_set_opa_portinfo()
1549 dd->vld[i].mtu = mtu; in __subn_set_opa_portinfo()
1559 if (dd->vld[15].mtu != mtu) { in __subn_set_opa_portinfo()
1562 dd->vld[15].mtu, mtu); in __subn_set_opa_portinfo()
1563 dd->vld[15].mtu = mtu; in __subn_set_opa_portinfo()
Dchip.c5838 if (dd->vld[15].sc == sc) in sc_to_vl()
5841 if (dd->vld[i].sc == sc) in sc_to_vl()
10160 u32 maxvlmtu = dd->vld[15].mtu; in set_send_length()
10161 u64 len1 = 0, len2 = (((dd->vld[15].mtu + max_hb) >> 2) in set_send_length()
10168 if (dd->vld[i].mtu > maxvlmtu) in set_send_length()
10169 maxvlmtu = dd->vld[i].mtu; in set_send_length()
10171 len1 |= (((dd->vld[i].mtu + max_hb) >> 2) in set_send_length()
10175 len2 |= (((dd->vld[i].mtu + max_hb) >> 2) in set_send_length()
10184 thres = min(sc_percent_to_threshold(dd->vld[i].sc, 50), in set_send_length()
10185 sc_mtu_to_threshold(dd->vld[i].sc, in set_send_length()
[all …]
Dsysfs.c478 return sprintf(buf, "%u\n", dd->vld[vlattr->vl].mtu); in vl2mtu_attr_show()
Ddriver.c1292 if (ppd->ibmtu < dd->vld[i].mtu) in set_mtu()
1293 ppd->ibmtu = dd->vld[i].mtu; in set_mtu()
Dhfi.h1091 struct per_vl_data vld[PER_VL_SEND_CONTEXTS]; member
Dverbs.c1573 ah->log_pmtu = ilog2(dd->vld[ah->vl].mtu); in hfi1_notify_new_ah()
/drivers/perf/
Dxgene_pmu.c538 XGENE_PMU_EVENT_ATTR(pd-entry-vld, 0x07),
539 XGENE_PMU_EVENT_ATTR(sref-entry-vld, 0x08),
549 XGENE_PMU_EVENT_ATTR(hprd-lprd-wr-req-vld, 0x12),
550 XGENE_PMU_EVENT_ATTR(lprd-req-vld, 0x13),
551 XGENE_PMU_EVENT_ATTR(hprd-req-vld, 0x14),
552 XGENE_PMU_EVENT_ATTR(hprd-lprd-req-vld, 0x15),
553 XGENE_PMU_EVENT_ATTR(wr-req-vld, 0x16),
554 XGENE_PMU_EVENT_ATTR(partial-wr-req-vld, 0x17),
/drivers/mtd/nand/raw/
Dqcom_nandc.c307 __le32 vld; member
402 u32 cmd1, vld; member
630 return &regs->vld; in offset_to_nandc_reg()
1184 (nandc->vld & ~READ_START_VLD)); in nandc_param()
1192 nandc_set_reg(nandc, NAND_DEV_CMD_VLD_RESTORE, nandc->vld); in nandc_param()
2796 nandc->vld = NAND_DEV_CMD_VLD_VAL; in qcom_nandc_setup()