1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * linux/include/linux/mmc/host.h
4 *
5 * Host driver specific definitions.
6 */
7 #ifndef LINUX_MMC_HOST_H
8 #define LINUX_MMC_HOST_H
9
10 #include <linux/sched.h>
11 #include <linux/device.h>
12 #include <linux/fault-inject.h>
13
14 #include <linux/mmc/core.h>
15 #include <linux/mmc/card.h>
16 #include <linux/mmc/pm.h>
17 #include <linux/dma-direction.h>
18 #include <linux/keyslot-manager.h>
19 #include <linux/android_kabi.h>
20
21 #include <linux/android_vendor.h>
22
23 struct mmc_ios {
24 unsigned int clock; /* clock rate */
25 unsigned short vdd;
26 unsigned int power_delay_ms; /* waiting for stable power */
27
28 /* vdd stores the bit number of the selected voltage range from below. */
29
30 unsigned char bus_mode; /* command output mode */
31
32 #define MMC_BUSMODE_OPENDRAIN 1
33 #define MMC_BUSMODE_PUSHPULL 2
34
35 unsigned char chip_select; /* SPI chip select */
36
37 #define MMC_CS_DONTCARE 0
38 #define MMC_CS_HIGH 1
39 #define MMC_CS_LOW 2
40
41 unsigned char power_mode; /* power supply mode */
42
43 #define MMC_POWER_OFF 0
44 #define MMC_POWER_UP 1
45 #define MMC_POWER_ON 2
46 #define MMC_POWER_UNDEFINED 3
47
48 unsigned char bus_width; /* data bus width */
49
50 #define MMC_BUS_WIDTH_1 0
51 #define MMC_BUS_WIDTH_4 2
52 #define MMC_BUS_WIDTH_8 3
53
54 unsigned char timing; /* timing specification used */
55
56 #define MMC_TIMING_LEGACY 0
57 #define MMC_TIMING_MMC_HS 1
58 #define MMC_TIMING_SD_HS 2
59 #define MMC_TIMING_UHS_SDR12 3
60 #define MMC_TIMING_UHS_SDR25 4
61 #define MMC_TIMING_UHS_SDR50 5
62 #define MMC_TIMING_UHS_SDR104 6
63 #define MMC_TIMING_UHS_DDR50 7
64 #define MMC_TIMING_MMC_DDR52 8
65 #define MMC_TIMING_MMC_HS200 9
66 #define MMC_TIMING_MMC_HS400 10
67
68 unsigned char signal_voltage; /* signalling voltage (1.8V or 3.3V) */
69
70 #define MMC_SIGNAL_VOLTAGE_330 0
71 #define MMC_SIGNAL_VOLTAGE_180 1
72 #define MMC_SIGNAL_VOLTAGE_120 2
73
74 unsigned char drv_type; /* driver type (A, B, C, D) */
75
76 #define MMC_SET_DRIVER_TYPE_B 0
77 #define MMC_SET_DRIVER_TYPE_A 1
78 #define MMC_SET_DRIVER_TYPE_C 2
79 #define MMC_SET_DRIVER_TYPE_D 3
80
81 bool enhanced_strobe; /* hs400es selection */
82 };
83
84 struct mmc_host;
85
86 struct mmc_host_ops {
87 /*
88 * It is optional for the host to implement pre_req and post_req in
89 * order to support double buffering of requests (prepare one
90 * request while another request is active).
91 * pre_req() must always be followed by a post_req().
92 * To undo a call made to pre_req(), call post_req() with
93 * a nonzero err condition.
94 */
95 void (*post_req)(struct mmc_host *host, struct mmc_request *req,
96 int err);
97 void (*pre_req)(struct mmc_host *host, struct mmc_request *req);
98 void (*request)(struct mmc_host *host, struct mmc_request *req);
99 /* Submit one request to host in atomic context. */
100 int (*request_atomic)(struct mmc_host *host,
101 struct mmc_request *req);
102
103 /*
104 * Avoid calling the next three functions too often or in a "fast
105 * path", since underlaying controller might implement them in an
106 * expensive and/or slow way. Also note that these functions might
107 * sleep, so don't call them in the atomic contexts!
108 */
109
110 /*
111 * Notes to the set_ios callback:
112 * ios->clock might be 0. For some controllers, setting 0Hz
113 * as any other frequency works. However, some controllers
114 * explicitly need to disable the clock. Otherwise e.g. voltage
115 * switching might fail because the SDCLK is not really quiet.
116 */
117 void (*set_ios)(struct mmc_host *host, struct mmc_ios *ios);
118
119 /*
120 * Return values for the get_ro callback should be:
121 * 0 for a read/write card
122 * 1 for a read-only card
123 * -ENOSYS when not supported (equal to NULL callback)
124 * or a negative errno value when something bad happened
125 */
126 int (*get_ro)(struct mmc_host *host);
127
128 /*
129 * Return values for the get_cd callback should be:
130 * 0 for a absent card
131 * 1 for a present card
132 * -ENOSYS when not supported (equal to NULL callback)
133 * or a negative errno value when something bad happened
134 */
135 int (*get_cd)(struct mmc_host *host);
136
137 void (*enable_sdio_irq)(struct mmc_host *host, int enable);
138 /* Mandatory callback when using MMC_CAP2_SDIO_IRQ_NOTHREAD. */
139 void (*ack_sdio_irq)(struct mmc_host *host);
140
141 /* optional callback for HC quirks */
142 void (*init_card)(struct mmc_host *host, struct mmc_card *card);
143
144 int (*start_signal_voltage_switch)(struct mmc_host *host, struct mmc_ios *ios);
145
146 /* Check if the card is pulling dat[0:3] low */
147 int (*card_busy)(struct mmc_host *host);
148
149 /* The tuning command opcode value is different for SD and eMMC cards */
150 int (*execute_tuning)(struct mmc_host *host, u32 opcode);
151
152 /* Prepare HS400 target operating frequency depending host driver */
153 int (*prepare_hs400_tuning)(struct mmc_host *host, struct mmc_ios *ios);
154
155 /* Prepare switch to DDR during the HS400 init sequence */
156 int (*hs400_prepare_ddr)(struct mmc_host *host);
157
158 /* Prepare for switching from HS400 to HS200 */
159 void (*hs400_downgrade)(struct mmc_host *host);
160
161 /* Complete selection of HS400 */
162 void (*hs400_complete)(struct mmc_host *host);
163
164 /* Prepare enhanced strobe depending host driver */
165 void (*hs400_enhanced_strobe)(struct mmc_host *host,
166 struct mmc_ios *ios);
167 int (*select_drive_strength)(struct mmc_card *card,
168 unsigned int max_dtr, int host_drv,
169 int card_drv, int *drv_type);
170 /* Reset the eMMC card via RST_n */
171 void (*hw_reset)(struct mmc_host *host);
172 void (*card_event)(struct mmc_host *host);
173
174 /*
175 * Optional callback to support controllers with HW issues for multiple
176 * I/O. Returns the number of supported blocks for the request.
177 */
178 int (*multi_io_quirk)(struct mmc_card *card,
179 unsigned int direction, int blk_size);
180
181 ANDROID_KABI_RESERVE(1);
182 ANDROID_KABI_RESERVE(2);
183 };
184
185 struct mmc_cqe_ops {
186 /* Allocate resources, and make the CQE operational */
187 int (*cqe_enable)(struct mmc_host *host, struct mmc_card *card);
188 /* Free resources, and make the CQE non-operational */
189 void (*cqe_disable)(struct mmc_host *host);
190 /*
191 * Issue a read, write or DCMD request to the CQE. Also deal with the
192 * effect of ->cqe_off().
193 */
194 int (*cqe_request)(struct mmc_host *host, struct mmc_request *mrq);
195 /* Free resources (e.g. DMA mapping) associated with the request */
196 void (*cqe_post_req)(struct mmc_host *host, struct mmc_request *mrq);
197 /*
198 * Prepare the CQE and host controller to accept non-CQ commands. There
199 * is no corresponding ->cqe_on(), instead ->cqe_request() is required
200 * to deal with that.
201 */
202 void (*cqe_off)(struct mmc_host *host);
203 /*
204 * Wait for all CQE tasks to complete. Return an error if recovery
205 * becomes necessary.
206 */
207 int (*cqe_wait_for_idle)(struct mmc_host *host);
208 /*
209 * Notify CQE that a request has timed out. Return false if the request
210 * completed or true if a timeout happened in which case indicate if
211 * recovery is needed.
212 */
213 bool (*cqe_timeout)(struct mmc_host *host, struct mmc_request *mrq,
214 bool *recovery_needed);
215 /*
216 * Stop all CQE activity and prepare the CQE and host controller to
217 * accept recovery commands.
218 */
219 void (*cqe_recovery_start)(struct mmc_host *host);
220 /*
221 * Clear the queue and call mmc_cqe_request_done() on all requests.
222 * Requests that errored will have the error set on the mmc_request
223 * (data->error or cmd->error for DCMD). Requests that did not error
224 * will have zero data bytes transferred.
225 */
226 void (*cqe_recovery_finish)(struct mmc_host *host);
227
228 ANDROID_KABI_RESERVE(1);
229 ANDROID_KABI_RESERVE(2);
230 };
231
232 struct mmc_async_req {
233 /* active mmc request */
234 struct mmc_request *mrq;
235 /*
236 * Check error status of completed mmc request.
237 * Returns 0 if success otherwise non zero.
238 */
239 enum mmc_blk_status (*err_check)(struct mmc_card *, struct mmc_async_req *);
240 };
241
242 /**
243 * struct mmc_slot - MMC slot functions
244 *
245 * @cd_irq: MMC/SD-card slot hotplug detection IRQ or -EINVAL
246 * @handler_priv: MMC/SD-card slot context
247 *
248 * Some MMC/SD host controllers implement slot-functions like card and
249 * write-protect detection natively. However, a large number of controllers
250 * leave these functions to the CPU. This struct provides a hook to attach
251 * such slot-function drivers.
252 */
253 struct mmc_slot {
254 int cd_irq;
255 bool cd_wake_enabled;
256 ANDROID_OEM_DATA_ARRAY(1, 2);
257 void *handler_priv;
258 };
259
260 /**
261 * mmc_context_info - synchronization details for mmc context
262 * @is_done_rcv wake up reason was done request
263 * @is_new_req wake up reason was new request
264 * @is_waiting_last_req mmc context waiting for single running request
265 * @wait wait queue
266 */
267 struct mmc_context_info {
268 bool is_done_rcv;
269 bool is_new_req;
270 bool is_waiting_last_req;
271 wait_queue_head_t wait;
272 };
273
274 struct regulator;
275 struct mmc_pwrseq;
276
277 struct mmc_supply {
278 struct regulator *vmmc; /* Card power supply */
279 struct regulator *vqmmc; /* Optional Vccq supply */
280 };
281
282 struct mmc_ctx {
283 struct task_struct *task;
284 };
285
286 struct mmc_host {
287 struct device *parent;
288 struct device class_dev;
289 int index;
290 const struct mmc_host_ops *ops;
291 struct mmc_pwrseq *pwrseq;
292 unsigned int f_min;
293 unsigned int f_max;
294 unsigned int f_init;
295 u32 ocr_avail;
296 u32 ocr_avail_sdio; /* SDIO-specific OCR */
297 u32 ocr_avail_sd; /* SD-specific OCR */
298 u32 ocr_avail_mmc; /* MMC-specific OCR */
299 struct wakeup_source *ws; /* Enable consume of uevents */
300 u32 max_current_330;
301 u32 max_current_300;
302 u32 max_current_180;
303
304 #define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */
305 #define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */
306 #define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */
307 #define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */
308 #define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */
309 #define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */
310 #define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */
311 #define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */
312 #define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */
313 #define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */
314 #define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */
315 #define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */
316 #define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */
317 #define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */
318 #define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */
319 #define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */
320 #define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */
321
322 u32 caps; /* Host capabilities */
323
324 #define MMC_CAP_4_BIT_DATA (1 << 0) /* Can the host do 4 bit transfers */
325 #define MMC_CAP_MMC_HIGHSPEED (1 << 1) /* Can do MMC high-speed timing */
326 #define MMC_CAP_SD_HIGHSPEED (1 << 2) /* Can do SD high-speed timing */
327 #define MMC_CAP_SDIO_IRQ (1 << 3) /* Can signal pending SDIO IRQs */
328 #define MMC_CAP_SPI (1 << 4) /* Talks only SPI protocols */
329 #define MMC_CAP_NEEDS_POLL (1 << 5) /* Needs polling for card-detection */
330 #define MMC_CAP_8_BIT_DATA (1 << 6) /* Can the host do 8 bit transfers */
331 #define MMC_CAP_AGGRESSIVE_PM (1 << 7) /* Suspend (e)MMC/SD at idle */
332 #define MMC_CAP_NONREMOVABLE (1 << 8) /* Nonremovable e.g. eMMC */
333 #define MMC_CAP_WAIT_WHILE_BUSY (1 << 9) /* Waits while card is busy */
334 #define MMC_CAP_3_3V_DDR (1 << 11) /* Host supports eMMC DDR 3.3V */
335 #define MMC_CAP_1_8V_DDR (1 << 12) /* Host supports eMMC DDR 1.8V */
336 #define MMC_CAP_1_2V_DDR (1 << 13) /* Host supports eMMC DDR 1.2V */
337 #define MMC_CAP_DDR (MMC_CAP_3_3V_DDR | MMC_CAP_1_8V_DDR | \
338 MMC_CAP_1_2V_DDR)
339 #define MMC_CAP_POWER_OFF_CARD (1 << 14) /* Can power off after boot */
340 #define MMC_CAP_BUS_WIDTH_TEST (1 << 15) /* CMD14/CMD19 bus width ok */
341 #define MMC_CAP_UHS_SDR12 (1 << 16) /* Host supports UHS SDR12 mode */
342 #define MMC_CAP_UHS_SDR25 (1 << 17) /* Host supports UHS SDR25 mode */
343 #define MMC_CAP_UHS_SDR50 (1 << 18) /* Host supports UHS SDR50 mode */
344 #define MMC_CAP_UHS_SDR104 (1 << 19) /* Host supports UHS SDR104 mode */
345 #define MMC_CAP_UHS_DDR50 (1 << 20) /* Host supports UHS DDR50 mode */
346 #define MMC_CAP_UHS (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | \
347 MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR104 | \
348 MMC_CAP_UHS_DDR50)
349 #define MMC_CAP_SYNC_RUNTIME_PM (1 << 21) /* Synced runtime PM suspends. */
350 #define MMC_CAP_NEED_RSP_BUSY (1 << 22) /* Commands with R1B can't use R1. */
351 #define MMC_CAP_DRIVER_TYPE_A (1 << 23) /* Host supports Driver Type A */
352 #define MMC_CAP_DRIVER_TYPE_C (1 << 24) /* Host supports Driver Type C */
353 #define MMC_CAP_DRIVER_TYPE_D (1 << 25) /* Host supports Driver Type D */
354 #define MMC_CAP_DONE_COMPLETE (1 << 27) /* RW reqs can be completed within mmc_request_done() */
355 #define MMC_CAP_CD_WAKE (1 << 28) /* Enable card detect wake */
356 #define MMC_CAP_CMD_DURING_TFR (1 << 29) /* Commands during data transfer */
357 #define MMC_CAP_CMD23 (1 << 30) /* CMD23 supported. */
358 #define MMC_CAP_HW_RESET (1 << 31) /* Reset the eMMC card via RST_n */
359
360 u32 caps2; /* More host capabilities */
361
362 #define MMC_CAP2_BOOTPART_NOACC (1 << 0) /* Boot partition no access */
363 #define MMC_CAP2_FULL_PWR_CYCLE (1 << 2) /* Can do full power cycle */
364 #define MMC_CAP2_FULL_PWR_CYCLE_IN_SUSPEND (1 << 3) /* Can do full power cycle in suspend */
365 #define MMC_CAP2_HS200_1_8V_SDR (1 << 5) /* can support */
366 #define MMC_CAP2_HS200_1_2V_SDR (1 << 6) /* can support */
367 #define MMC_CAP2_HS200 (MMC_CAP2_HS200_1_8V_SDR | \
368 MMC_CAP2_HS200_1_2V_SDR)
369 #define MMC_CAP2_CD_ACTIVE_HIGH (1 << 10) /* Card-detect signal active high */
370 #define MMC_CAP2_RO_ACTIVE_HIGH (1 << 11) /* Write-protect signal active high */
371 #define MMC_CAP2_NO_PRESCAN_POWERUP (1 << 14) /* Don't power up before scan */
372 #define MMC_CAP2_HS400_1_8V (1 << 15) /* Can support HS400 1.8V */
373 #define MMC_CAP2_HS400_1_2V (1 << 16) /* Can support HS400 1.2V */
374 #define MMC_CAP2_HS400 (MMC_CAP2_HS400_1_8V | \
375 MMC_CAP2_HS400_1_2V)
376 #define MMC_CAP2_HSX00_1_8V (MMC_CAP2_HS200_1_8V_SDR | MMC_CAP2_HS400_1_8V)
377 #define MMC_CAP2_HSX00_1_2V (MMC_CAP2_HS200_1_2V_SDR | MMC_CAP2_HS400_1_2V)
378 #define MMC_CAP2_SDIO_IRQ_NOTHREAD (1 << 17)
379 #define MMC_CAP2_NO_WRITE_PROTECT (1 << 18) /* No physical write protect pin, assume that card is always read-write */
380 #define MMC_CAP2_NO_SDIO (1 << 19) /* Do not send SDIO commands during initialization */
381 #define MMC_CAP2_HS400_ES (1 << 20) /* Host supports enhanced strobe */
382 #define MMC_CAP2_NO_SD (1 << 21) /* Do not send SD commands during initialization */
383 #define MMC_CAP2_NO_MMC (1 << 22) /* Do not send (e)MMC commands during initialization */
384 #define MMC_CAP2_CQE (1 << 23) /* Has eMMC command queue engine */
385 #define MMC_CAP2_CQE_DCMD (1 << 24) /* CQE can issue a direct command */
386 #define MMC_CAP2_AVOID_3_3V (1 << 25) /* Host must negotiate down from 3.3V */
387 #define MMC_CAP2_MERGE_CAPABLE (1 << 26) /* Host can merge a segment over the segment size */
388 #ifdef CONFIG_MMC_CRYPTO
389 #define MMC_CAP2_CRYPTO (1 << 27) /* Host supports inline encryption */
390 #else
391 #define MMC_CAP2_CRYPTO 0
392 #endif
393
394 int fixed_drv_type; /* fixed driver type for non-removable media */
395
396 mmc_pm_flag_t pm_caps; /* supported pm features */
397
398 /* host specific block data */
399 unsigned int max_seg_size; /* see blk_queue_max_segment_size */
400 unsigned short max_segs; /* see blk_queue_max_segments */
401 unsigned short unused;
402 unsigned int max_req_size; /* maximum number of bytes in one req */
403 unsigned int max_blk_size; /* maximum size of one mmc block */
404 unsigned int max_blk_count; /* maximum number of blocks in one req */
405 unsigned int max_busy_timeout; /* max busy timeout in ms */
406
407 /* private data */
408 spinlock_t lock; /* lock for claim and bus ops */
409
410 struct mmc_ios ios; /* current io bus settings */
411
412 /* group bitfields together to minimize padding */
413 unsigned int use_spi_crc:1;
414 unsigned int claimed:1; /* host exclusively claimed */
415 unsigned int bus_dead:1; /* bus has been released */
416 unsigned int doing_init_tune:1; /* initial tuning in progress */
417 unsigned int can_retune:1; /* re-tuning can be used */
418 unsigned int doing_retune:1; /* re-tuning in progress */
419 unsigned int retune_now:1; /* do re-tuning at next req */
420 unsigned int retune_paused:1; /* re-tuning is temporarily disabled */
421 unsigned int use_blk_mq:1; /* use blk-mq */
422 unsigned int retune_crc_disable:1; /* don't trigger retune upon crc */
423 unsigned int can_dma_map_merge:1; /* merging can be used */
424
425 int rescan_disable; /* disable card detection */
426 int rescan_entered; /* used with nonremovable devices */
427
428 int need_retune; /* re-tuning is needed */
429 int hold_retune; /* hold off re-tuning */
430 unsigned int retune_period; /* re-tuning period in secs */
431 struct timer_list retune_timer; /* for periodic re-tuning */
432
433 bool trigger_card_event; /* card_event necessary */
434
435 struct mmc_card *card; /* device attached to this host */
436
437 wait_queue_head_t wq;
438 struct mmc_ctx *claimer; /* context that has host claimed */
439 int claim_cnt; /* "claim" nesting count */
440 struct mmc_ctx default_ctx; /* default context */
441
442 struct delayed_work detect;
443 int detect_change; /* card detect flag */
444 struct mmc_slot slot;
445
446 const struct mmc_bus_ops *bus_ops; /* current bus driver */
447 unsigned int bus_refs; /* reference counter */
448
449 unsigned int sdio_irqs;
450 struct task_struct *sdio_irq_thread;
451 struct delayed_work sdio_irq_work;
452 bool sdio_irq_pending;
453 atomic_t sdio_irq_thread_abort;
454
455 mmc_pm_flag_t pm_flags; /* requested pm features */
456
457 struct led_trigger *led; /* activity led */
458
459 #ifdef CONFIG_REGULATOR
460 bool regulator_enabled; /* regulator state */
461 #endif
462 struct mmc_supply supply;
463
464 struct dentry *debugfs_root;
465
466 /* Ongoing data transfer that allows commands during transfer */
467 struct mmc_request *ongoing_mrq;
468
469 #ifdef CONFIG_FAIL_MMC_REQUEST
470 struct fault_attr fail_mmc_request;
471 #endif
472
473 unsigned int actual_clock; /* Actual HC clock rate */
474
475 unsigned int slotno; /* used for sdio acpi binding */
476
477 int dsr_req; /* DSR value is valid */
478 u32 dsr; /* optional driver stage (DSR) value */
479
480 /* Command Queue Engine (CQE) support */
481 const struct mmc_cqe_ops *cqe_ops;
482 void *cqe_private;
483 int cqe_qdepth;
484 bool cqe_enabled;
485 bool cqe_on;
486
487 /* Inline encryption support */
488 #ifdef CONFIG_MMC_CRYPTO
489 struct blk_keyslot_manager ksm;
490 #endif
491
492 /* Host Software Queue support */
493 bool hsq_enabled;
494
495 ANDROID_KABI_RESERVE(1);
496 ANDROID_KABI_RESERVE(2);
497 ANDROID_VENDOR_DATA(1);
498 ANDROID_OEM_DATA(1);
499
500 unsigned long private[] ____cacheline_aligned;
501 };
502
503 struct device_node;
504
505 struct mmc_host *mmc_alloc_host(int extra, struct device *);
506 struct mmc_host *devm_mmc_alloc_host(struct device *dev, int extra);
507 int mmc_add_host(struct mmc_host *);
508 void mmc_remove_host(struct mmc_host *);
509 void mmc_free_host(struct mmc_host *);
510 int mmc_of_parse(struct mmc_host *host);
511 int mmc_of_parse_voltage(struct device_node *np, u32 *mask);
512
mmc_priv(struct mmc_host * host)513 static inline void *mmc_priv(struct mmc_host *host)
514 {
515 return (void *)host->private;
516 }
517
mmc_from_priv(void * priv)518 static inline struct mmc_host *mmc_from_priv(void *priv)
519 {
520 return container_of(priv, struct mmc_host, private);
521 }
522
523 #define mmc_host_is_spi(host) ((host)->caps & MMC_CAP_SPI)
524
525 #define mmc_dev(x) ((x)->parent)
526 #define mmc_classdev(x) (&(x)->class_dev)
527 #define mmc_hostname(x) (dev_name(&(x)->class_dev))
528
529 void mmc_detect_change(struct mmc_host *, unsigned long delay);
530 void mmc_request_done(struct mmc_host *, struct mmc_request *);
531 void mmc_command_done(struct mmc_host *host, struct mmc_request *mrq);
532
533 void mmc_cqe_request_done(struct mmc_host *host, struct mmc_request *mrq);
534
535 /*
536 * May be called from host driver's system/runtime suspend/resume callbacks,
537 * to know if SDIO IRQs has been claimed.
538 */
sdio_irq_claimed(struct mmc_host * host)539 static inline bool sdio_irq_claimed(struct mmc_host *host)
540 {
541 return host->sdio_irqs > 0;
542 }
543
mmc_signal_sdio_irq(struct mmc_host * host)544 static inline void mmc_signal_sdio_irq(struct mmc_host *host)
545 {
546 host->ops->enable_sdio_irq(host, 0);
547 host->sdio_irq_pending = true;
548 if (host->sdio_irq_thread)
549 wake_up_process(host->sdio_irq_thread);
550 }
551
552 void sdio_signal_irq(struct mmc_host *host);
553
554 #ifdef CONFIG_REGULATOR
555 int mmc_regulator_set_ocr(struct mmc_host *mmc,
556 struct regulator *supply,
557 unsigned short vdd_bit);
558 int mmc_regulator_set_vqmmc(struct mmc_host *mmc, struct mmc_ios *ios);
559 #else
mmc_regulator_set_ocr(struct mmc_host * mmc,struct regulator * supply,unsigned short vdd_bit)560 static inline int mmc_regulator_set_ocr(struct mmc_host *mmc,
561 struct regulator *supply,
562 unsigned short vdd_bit)
563 {
564 return 0;
565 }
566
mmc_regulator_set_vqmmc(struct mmc_host * mmc,struct mmc_ios * ios)567 static inline int mmc_regulator_set_vqmmc(struct mmc_host *mmc,
568 struct mmc_ios *ios)
569 {
570 return -EINVAL;
571 }
572 #endif
573
574 int mmc_regulator_get_supply(struct mmc_host *mmc);
575
mmc_card_is_removable(struct mmc_host * host)576 static inline int mmc_card_is_removable(struct mmc_host *host)
577 {
578 return !(host->caps & MMC_CAP_NONREMOVABLE);
579 }
580
mmc_card_keep_power(struct mmc_host * host)581 static inline int mmc_card_keep_power(struct mmc_host *host)
582 {
583 return host->pm_flags & MMC_PM_KEEP_POWER;
584 }
585
mmc_card_wake_sdio_irq(struct mmc_host * host)586 static inline int mmc_card_wake_sdio_irq(struct mmc_host *host)
587 {
588 return host->pm_flags & MMC_PM_WAKE_SDIO_IRQ;
589 }
590
591 /* TODO: Move to private header */
mmc_card_hs(struct mmc_card * card)592 static inline int mmc_card_hs(struct mmc_card *card)
593 {
594 return card->host->ios.timing == MMC_TIMING_SD_HS ||
595 card->host->ios.timing == MMC_TIMING_MMC_HS;
596 }
597
598 /* TODO: Move to private header */
mmc_card_uhs(struct mmc_card * card)599 static inline int mmc_card_uhs(struct mmc_card *card)
600 {
601 return card->host->ios.timing >= MMC_TIMING_UHS_SDR12 &&
602 card->host->ios.timing <= MMC_TIMING_UHS_DDR50;
603 }
604
605 void mmc_retune_timer_stop(struct mmc_host *host);
606
mmc_retune_needed(struct mmc_host * host)607 static inline void mmc_retune_needed(struct mmc_host *host)
608 {
609 if (host->can_retune)
610 host->need_retune = 1;
611 }
612
mmc_can_retune(struct mmc_host * host)613 static inline bool mmc_can_retune(struct mmc_host *host)
614 {
615 return host->can_retune == 1;
616 }
617
mmc_doing_retune(struct mmc_host * host)618 static inline bool mmc_doing_retune(struct mmc_host *host)
619 {
620 return host->doing_retune == 1;
621 }
622
mmc_doing_tune(struct mmc_host * host)623 static inline bool mmc_doing_tune(struct mmc_host *host)
624 {
625 return host->doing_retune == 1 || host->doing_init_tune == 1;
626 }
627
mmc_get_dma_dir(struct mmc_data * data)628 static inline enum dma_data_direction mmc_get_dma_dir(struct mmc_data *data)
629 {
630 return data->flags & MMC_DATA_WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
631 }
632
633 int mmc_send_tuning(struct mmc_host *host, u32 opcode, int *cmd_error);
634 int mmc_abort_tuning(struct mmc_host *host, u32 opcode);
635
636 #endif /* LINUX_MMC_HOST_H */
637