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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /**
3  * Copyright (C) 2008, Creative Technology Ltd. All Rights Reserved.
4  *
5  * @File	cthardware.h
6  *
7  * @Brief
8  * This file contains the definition of hardware access methord.
9  *
10  * @Author	Liu Chun
11  * @Date 	May 13 2008
12  */
13 
14 #ifndef CTHARDWARE_H
15 #define CTHARDWARE_H
16 
17 #include <linux/types.h>
18 #include <linux/pci.h>
19 #include <sound/core.h>
20 
21 enum CHIPTYP {
22 	ATC20K1,
23 	ATC20K2,
24 	ATCNONE
25 };
26 
27 enum CTCARDS {
28 	/* 20k1 models */
29 	CTSB046X,
30 	CT20K1_MODEL_FIRST = CTSB046X,
31 	CTSB055X,
32 	CTSB073X,
33 	CTUAA,
34 	CT20K1_UNKNOWN,
35 	/* 20k2 models */
36 	CTSB0760,
37 	CT20K2_MODEL_FIRST = CTSB0760,
38 	CTHENDRIX,
39 	CTSB0880,
40 	CTSB1270,
41 	CT20K2_UNKNOWN,
42 	NUM_CTCARDS		/* This should always be the last */
43 };
44 
45 /* Type of input source for ADC */
46 enum ADCSRC{
47 	ADC_MICIN,
48 	ADC_LINEIN,
49 	ADC_VIDEO,
50 	ADC_AUX,
51 	ADC_NONE	/* Switch to digital input */
52 };
53 
54 struct card_conf {
55 	/* device virtual mem page table page physical addr
56 	 * (supporting one page table page now) */
57 	unsigned long vm_pgt_phys;
58 	unsigned int rsr;	/* reference sample rate in Hzs*/
59 	unsigned int msr;	/* master sample rate in rsrs */
60 };
61 
62 struct capabilities {
63 	unsigned int digit_io_switch:1;
64 	unsigned int dedicated_mic:1;
65 	unsigned int output_switch:1;
66 	unsigned int mic_source_switch:1;
67 };
68 
69 struct hw {
70 	int (*card_init)(struct hw *hw, struct card_conf *info);
71 	int (*card_stop)(struct hw *hw);
72 	int (*pll_init)(struct hw *hw, unsigned int rsr);
73 #ifdef CONFIG_PM_SLEEP
74 	int (*suspend)(struct hw *hw);
75 	int (*resume)(struct hw *hw, struct card_conf *info);
76 #endif
77 	int (*is_adc_source_selected)(struct hw *hw, enum ADCSRC source);
78 	int (*select_adc_source)(struct hw *hw, enum ADCSRC source);
79 	struct capabilities (*capabilities)(struct hw *hw);
80 	int (*output_switch_get)(struct hw *hw);
81 	int (*output_switch_put)(struct hw *hw, int position);
82 	int (*mic_source_switch_get)(struct hw *hw);
83 	int (*mic_source_switch_put)(struct hw *hw, int position);
84 
85 	/* SRC operations */
86 	int (*src_rsc_get_ctrl_blk)(void **rblk);
87 	int (*src_rsc_put_ctrl_blk)(void *blk);
88 	int (*src_set_state)(void *blk, unsigned int state);
89 	int (*src_set_bm)(void *blk, unsigned int bm);
90 	int (*src_set_rsr)(void *blk, unsigned int rsr);
91 	int (*src_set_sf)(void *blk, unsigned int sf);
92 	int (*src_set_wr)(void *blk, unsigned int wr);
93 	int (*src_set_pm)(void *blk, unsigned int pm);
94 	int (*src_set_rom)(void *blk, unsigned int rom);
95 	int (*src_set_vo)(void *blk, unsigned int vo);
96 	int (*src_set_st)(void *blk, unsigned int st);
97 	int (*src_set_ie)(void *blk, unsigned int ie);
98 	int (*src_set_ilsz)(void *blk, unsigned int ilsz);
99 	int (*src_set_bp)(void *blk, unsigned int bp);
100 	int (*src_set_cisz)(void *blk, unsigned int cisz);
101 	int (*src_set_ca)(void *blk, unsigned int ca);
102 	int (*src_set_sa)(void *blk, unsigned int sa);
103 	int (*src_set_la)(void *blk, unsigned int la);
104 	int (*src_set_pitch)(void *blk, unsigned int pitch);
105 	int (*src_set_clear_zbufs)(void *blk, unsigned int clear);
106 	int (*src_set_dirty)(void *blk, unsigned int flags);
107 	int (*src_set_dirty_all)(void *blk);
108 	int (*src_commit_write)(struct hw *hw, unsigned int idx, void *blk);
109 	int (*src_get_ca)(struct hw *hw, unsigned int idx, void *blk);
110 	unsigned int (*src_get_dirty)(void *blk);
111 	unsigned int (*src_dirty_conj_mask)(void);
112 	int (*src_mgr_get_ctrl_blk)(void **rblk);
113 	int (*src_mgr_put_ctrl_blk)(void *blk);
114 	/* syncly enable src @idx */
115 	int (*src_mgr_enbs_src)(void *blk, unsigned int idx);
116 	/* enable src @idx */
117 	int (*src_mgr_enb_src)(void *blk, unsigned int idx);
118 	/* disable src @idx */
119 	int (*src_mgr_dsb_src)(void *blk, unsigned int idx);
120 	int (*src_mgr_commit_write)(struct hw *hw, void *blk);
121 
122 	/* SRC Input Mapper operations */
123 	int (*srcimp_mgr_get_ctrl_blk)(void **rblk);
124 	int (*srcimp_mgr_put_ctrl_blk)(void *blk);
125 	int (*srcimp_mgr_set_imaparc)(void *blk, unsigned int slot);
126 	int (*srcimp_mgr_set_imapuser)(void *blk, unsigned int user);
127 	int (*srcimp_mgr_set_imapnxt)(void *blk, unsigned int next);
128 	int (*srcimp_mgr_set_imapaddr)(void *blk, unsigned int addr);
129 	int (*srcimp_mgr_commit_write)(struct hw *hw, void *blk);
130 
131 	/* AMIXER operations */
132 	int (*amixer_rsc_get_ctrl_blk)(void **rblk);
133 	int (*amixer_rsc_put_ctrl_blk)(void *blk);
134 	int (*amixer_mgr_get_ctrl_blk)(void **rblk);
135 	int (*amixer_mgr_put_ctrl_blk)(void *blk);
136 	int (*amixer_set_mode)(void *blk, unsigned int mode);
137 	int (*amixer_set_iv)(void *blk, unsigned int iv);
138 	int (*amixer_set_x)(void *blk, unsigned int x);
139 	int (*amixer_set_y)(void *blk, unsigned int y);
140 	int (*amixer_set_sadr)(void *blk, unsigned int sadr);
141 	int (*amixer_set_se)(void *blk, unsigned int se);
142 	int (*amixer_set_dirty)(void *blk, unsigned int flags);
143 	int (*amixer_set_dirty_all)(void *blk);
144 	int (*amixer_commit_write)(struct hw *hw, unsigned int idx, void *blk);
145 	int (*amixer_get_y)(void *blk);
146 	unsigned int (*amixer_get_dirty)(void *blk);
147 
148 	/* DAIO operations */
149 	int (*dai_get_ctrl_blk)(void **rblk);
150 	int (*dai_put_ctrl_blk)(void *blk);
151 	int (*dai_srt_set_srco)(void *blk, unsigned int src);
152 	int (*dai_srt_set_srcm)(void *blk, unsigned int src);
153 	int (*dai_srt_set_rsr)(void *blk, unsigned int rsr);
154 	int (*dai_srt_set_drat)(void *blk, unsigned int drat);
155 	int (*dai_srt_set_ec)(void *blk, unsigned int ec);
156 	int (*dai_srt_set_et)(void *blk, unsigned int et);
157 	int (*dai_commit_write)(struct hw *hw, unsigned int idx, void *blk);
158 	int (*dao_get_ctrl_blk)(void **rblk);
159 	int (*dao_put_ctrl_blk)(void *blk);
160 	int (*dao_set_spos)(void *blk, unsigned int spos);
161 	int (*dao_commit_write)(struct hw *hw, unsigned int idx, void *blk);
162 	int (*dao_get_spos)(void *blk, unsigned int *spos);
163 
164 	int (*daio_mgr_get_ctrl_blk)(struct hw *hw, void **rblk);
165 	int (*daio_mgr_put_ctrl_blk)(void *blk);
166 	int (*daio_mgr_enb_dai)(void *blk, unsigned int idx);
167 	int (*daio_mgr_dsb_dai)(void *blk, unsigned int idx);
168 	int (*daio_mgr_enb_dao)(void *blk, unsigned int idx);
169 	int (*daio_mgr_dsb_dao)(void *blk, unsigned int idx);
170 	int (*daio_mgr_dao_init)(void *blk, unsigned int idx,
171 						unsigned int conf);
172 	int (*daio_mgr_set_imaparc)(void *blk, unsigned int slot);
173 	int (*daio_mgr_set_imapnxt)(void *blk, unsigned int next);
174 	int (*daio_mgr_set_imapaddr)(void *blk, unsigned int addr);
175 	int (*daio_mgr_commit_write)(struct hw *hw, void *blk);
176 
177 	int (*set_timer_irq)(struct hw *hw, int enable);
178 	int (*set_timer_tick)(struct hw *hw, unsigned int tick);
179 	unsigned int (*get_wc)(struct hw *hw);
180 
181 	void (*irq_callback)(void *data, unsigned int bit);
182 	void *irq_callback_data;
183 
184 	struct pci_dev *pci;	/* the pci kernel structure of this card */
185 	struct snd_card *card;	/* pointer to this card */
186 	int irq;
187 	unsigned long io_base;
188 	void __iomem *mem_base;
189 
190 	enum CHIPTYP chip_type;
191 	enum CTCARDS model;
192 };
193 
194 int create_hw_obj(struct pci_dev *pci, enum CHIPTYP chip_type,
195 		  enum CTCARDS model, struct hw **rhw);
196 int destroy_hw_obj(struct hw *hw);
197 
198 unsigned int get_field(unsigned int data, unsigned int field);
199 void set_field(unsigned int *data, unsigned int field, unsigned int value);
200 
201 /* IRQ bits */
202 #define	PLL_INT		(1 << 10) /* PLL input-clock out-of-range */
203 #define FI_INT		(1 << 9)  /* forced interrupt */
204 #define IT_INT		(1 << 8)  /* timer interrupt */
205 #define PCI_INT		(1 << 7)  /* PCI bus error pending */
206 #define URT_INT		(1 << 6)  /* UART Tx/Rx */
207 #define GPI_INT		(1 << 5)  /* GPI pin */
208 #define MIX_INT		(1 << 4)  /* mixer parameter segment FIFO channels */
209 #define DAI_INT		(1 << 3)  /* DAI (SR-tracker or SPDIF-receiver) */
210 #define TP_INT		(1 << 2)  /* transport priority queue */
211 #define DSP_INT		(1 << 1)  /* DSP */
212 #define SRC_INT		(1 << 0)  /* SRC channels */
213 
214 #endif /* CTHARDWARE_H */
215