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Searched refs:SKL_ADSP_REG_CL_SD_CBL (Results 1 – 2 of 2) sorted by relevance

/sound/soc/intel/skylake/
Dskl-sst-cldma.c72 sst_dsp_shim_write(ctx, SKL_ADSP_REG_CL_SD_CBL, 0); in skl_cldma_stream_clear()
117 sst_dsp_shim_write(ctx, SKL_ADSP_REG_CL_SD_CBL, max_size); in skl_cldma_setup_controller()
Dskl-sst-cldma.h30 #define SKL_ADSP_REG_CL_SD_CBL (HDA_ADSP_LOADER_BASE + 0x08) macro