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Searched refs:CP0_ENTRYLO1 (Results 1 – 2 of 2) sorted by relevance

/arch/mips/include/asm/mach-ip27/
Dkernel-entry-init.h50 mtc0 t0, CP0_ENTRYLO1 # physaddr, DVG, cach exlwr
/arch/mips/include/asm/
Dmipsregs.h50 #define CP0_ENTRYLO1 $3 macro