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Searched refs:cond (Results 1 – 25 of 58) sorted by relevance

123

/arch/parisc/math-emu/
Ddfcmp.c38 unsigned int cond, unsigned int *status) in dbl_fcmp() argument
60 && (Exception(cond) || Dbl_isone_signaling(leftp1))) in dbl_fcmp()
64 && (Exception(cond) || Dbl_isone_signaling(rightp1))) ) in dbl_fcmp()
67 Set_status_cbit(Unordered(cond)); in dbl_fcmp()
71 Set_status_cbit(Unordered(cond)); in dbl_fcmp()
83 Set_status_cbit(Unordered(cond)); in dbl_fcmp()
98 Set_status_cbit(Equal(cond)); in dbl_fcmp()
102 Set_status_cbit(Lessthan(cond)); in dbl_fcmp()
106 Set_status_cbit(Greaterthan(cond)); in dbl_fcmp()
113 Set_status_cbit(Equal(cond)); in dbl_fcmp()
[all …]
Dsfcmp.c37 unsigned int cond, unsigned int *status) in sgl_fcmp() argument
60 && (Exception(cond) || Sgl_isone_signaling(left))) in sgl_fcmp()
64 && (Exception(cond) || Sgl_isone_signaling(right)) ) ) in sgl_fcmp()
67 Set_status_cbit(Unordered(cond)); in sgl_fcmp()
71 Set_status_cbit(Unordered(cond)); in sgl_fcmp()
83 Set_status_cbit(Unordered(cond)); in sgl_fcmp()
98 Set_status_cbit(Equal(cond)); in sgl_fcmp()
102 Set_status_cbit(Lessthan(cond)); in sgl_fcmp()
106 Set_status_cbit(Greaterthan(cond)); in sgl_fcmp()
113 Set_status_cbit(Equal(cond)); in sgl_fcmp()
[all …]
Dfloat.h522 #define Unordered(cond) Unorderedbit(cond)
523 #define Equal(cond) Equalbit(cond)
524 #define Lessthan(cond) Lessthanbit(cond)
525 #define Greaterthan(cond) Greaterthanbit(cond)
526 #define Exception(cond) Exceptionbit(cond)
/arch/arm64/kvm/hyp/
Daarch32.c51 int cond; in kvm_condition_valid32() local
58 cond = kvm_vcpu_get_condition(vcpu); in kvm_condition_valid32()
59 if (cond == 0xE) in kvm_condition_valid32()
64 if (cond < 0) { in kvm_condition_valid32()
75 cond = (it >> 4); in kvm_condition_valid32()
80 if (!((cc_map[cond] >> cpsr_cond) & 1)) in kvm_condition_valid32()
98 unsigned long itbits, cond; in kvm_adjust_itstate() local
105 cond = (cpsr & 0xe000) >> 13; in kvm_adjust_itstate()
111 itbits = cond = 0; in kvm_adjust_itstate()
116 cpsr |= cond << 13; in kvm_adjust_itstate()
/arch/parisc/include/asm/
Dalternative.h26 u32 cond; /* see ALT_COND_XXX */ member
36 #define ALTERNATIVE(cond, replacement) "!0:" \ argument
38 ".word (0b-4-.), 1, " __stringify(cond) "," \
45 #define ALTERNATIVE(from, to, cond, replacement)\ argument
48 .word cond, replacement ! \
52 #define ALTERNATIVE_CODE(from, num_instructions, cond, new_instr_ptr)\ argument
55 .word cond, (new_instr_ptr - .) ! \
/arch/parisc/kernel/
Dalternative.c47 u32 *from, cond, replacement; in apply_alternatives() local
52 cond = entry->cond; in apply_alternatives()
55 WARN_ON(!cond); in apply_alternatives()
57 if ((cond & ALT_COND_ALWAYS) == 0 && no_alternatives) in apply_alternatives()
61 index, cond, len, from, replacement); in apply_alternatives()
64 if ((cond & cond_check) == 0) in apply_alternatives()
82 index, cond, len, replacement, from, from); in apply_alternatives()
/arch/arm/include/asm/
Dassembler.h132 .macro asm_trace_hardirqs_on, cond=al, save=1
141 bl\cond trace_hardirqs_on
193 asm_trace_hardirqs_on cond=eq
382 .macro usraccoff, instr, reg, ptr, inc, off, cond, abort, t=TUSER()
385 \instr\()b\t\cond\().w \reg, [\ptr, #\off]
387 \instr\t\cond\().w \reg, [\ptr, #\off]
398 .macro usracc, instr, reg, ptr, inc, cond, rept, abort
401 .ifnc \cond,al
403 itt \cond
405 ittt \cond
[all …]
Dvfpmacros.h12 .macro VFPFMRX, rd, sysreg, cond
13 vmrs\cond \rd, \sysreg
16 .macro VFPFMXR, sysreg, rd, cond
17 vmsr\cond \sysreg, \rd
21 .macro VFPFMRX, rd, sysreg, cond
22 MRC\cond p10, 7, \rd, \sysreg, cr0, 0 @ FMRX \rd, \sysreg
25 .macro VFPFMXR, sysreg, rd, cond
26 MCR\cond p10, 7, \rd, \sysreg, cr0, 0 @ FMXR \sysreg, \rd
Dspinlock.h29 #define WFE(cond) __ALT_SMP_ASM( \ argument
30 "it " cond "\n\t" \
31 "wfe" cond ".n", \
36 #define WFE(cond) __ALT_SMP_ASM("wfe" cond, "nop") argument
Ddomain.h134 #define TUSERCOND(instr, cond) #instr "t" #cond argument
137 #define TUSERCOND(instr, cond) #instr #cond argument
/arch/powerpc/net/
Dbpf_jit.h38 #define PPC_BCC_SHORT(cond, dest) \ argument
45 EMIT(PPC_INST_BRANCH_COND | (((cond) & 0x3ff) << 16) | (offset & 0xfffc)); \
95 #define PPC_BCC(cond, dest) do { \ argument
97 PPC_BCC_SHORT(cond, dest); \
101 PPC_BCC_SHORT(cond ^ COND_CMP_TRUE, (ctx->idx+2)*4); \
/arch/arm/lib/
Dmemcpy.S29 .macro ldr1b ptr reg cond=al abort argument
30 ldrb\cond \reg, [\ptr], #1
41 .macro str1b ptr reg cond=al abort argument
42 strb\cond \reg, [\ptr], #1
Dcopy_to_user.S48 .macro ldr1b ptr reg cond=al abort argument
49 ldrb\cond \reg, [\ptr], #1
89 .macro str1b ptr reg cond=al abort argument
90 strusr \reg, \ptr, 1, \cond, abort=\abort
Dcopy_from_user.S76 .macro ldr1b ptr reg cond=al abort argument
77 ldrusr \reg, \ptr, 1, \cond, abort=\abort
90 .macro str1b ptr reg cond=al abort argument
91 strb\cond \reg, [\ptr], #1
/arch/arm/boot/compressed/
Ddecompress.c16 # define Assert(cond,msg) {if(!(cond)) error(msg);} argument
23 # define Assert(cond,msg) argument
/arch/h8300/kernel/
Dptrace_h.c140 unsigned char cond = h8300_get_reg(task, PT_CCR); in isbranch() local
154 : "=&r"(cond) : "0"(cond) : "cc"); in isbranch()
155 cond &= condmask[reson >> 1]; in isbranch()
157 return cond == 0; in isbranch()
159 return cond != 0; in isbranch()
/arch/ia64/lib/
Dcopy_user.S108 (p10) br.cond.dptk .long_copy_user
158 (p15) br.cond.spnt 1f
168 br.cond.spnt .word_copy_user
205 (p9) br.cond.spnt 4f // if (16 > len1) skip 8-byte copy
237 (pred) br.cond.spnt .copy_user_bit##shift
247 br.cond.sptk.many .diff_align_do_tail; \
256 br.cond.sptk.many .failure_in2
326 (p8) br.cond.dpnt .diff_align_copy_user
367 (p7) br.cond.dpnt .dotail // we have less than 16 bytes left
464 br.cond.dptk.many .failure_in1bis
[all …]
Dmemset.S85 (p_scr) br.cond.dptk.many .move_bytes_unaligned // go move just a few (M_B_U)
121 (p_scr) br.cond.dpnt.many .fraction_of_line // go move just a few
127 (p_zr) br.cond.dptk.many .l1b // Jump to use stf.spill
195 (p_scr) br.cond.dpnt.many .fraction_of_line // Branch no. 2
196 br.cond.dpnt.many .move_bytes_from_alignment // Branch no. 3
249 (p_scr) br.cond.dpnt.many .move_bytes_from_alignment //
260 (p_scr) br.cond.dpnt.many .store_words
279 (p_scr) br.cond.dpnt.many .move_bytes_from_alignment // Branch
301 (p_scr) br.cond.dpnt.few .restore_and_exit
/arch/alpha/boot/
Dmisc.c65 # define Assert(cond,msg) {if(!(cond)) error(msg);} argument
72 # define Assert(cond,msg) argument
/arch/nios2/boot/compressed/
Dmisc.c55 # define Assert(cond, msg) {if (!(cond)) error(msg); } argument
62 # define Assert(cond, msg) argument
/arch/ia64/kernel/
Dentry.S186 (p6) br.cond.dpnt .map
217 br.cond.sptk .done
350 br.cond.sptk.many b7
450 br.cond.sptk.many b7
481 (p6) br.cond.sptk strace_error // syscall failed ->
516 (p6) br.cond.sptk strace_error // syscall failed ->
525 br.cond.sptk ia64_work_pending_syscall_end
536 br.cond.sptk .strace_save_retval
553 .ret4: br.cond.sptk ia64_leave_kernel
602 (p6) br.cond.spnt .strace_check_retval
[all …]
Dfsys.S147 (p6) br.cond.spnt.few .fail_einval
196 (p6) br.cond.spnt.few .fail_einval
211 (p6) br.cond.spnt.many fsys_fallback_syscall
273 (p7) br.cond.dpnt.few .time_redo // sequence number changed, redo
290 (p6) br.cond.dpnt.few .time_normalize
343 (p6) br.cond.spnt.few .fail_einval // B
346 (p7) br.cond.spnt.few .fail_einval // B
540 (p10) br.cond.spnt.many ia64_ret_from_syscall // B return if bad call-frame or r15 is a NaT
544 br.cond.spnt ia64_trace_syscall // B
Drelocate_kernel.S80 (p7) br.cond.dpnt.few 4f
138 (p6) br.cond.sptk.few .loop;;
142 (p6) br.cond.sptk.few .loop;;
145 (p6) br.cond.sptk.few .end_loop;;
148 (p6) br.cond.sptk.few .loop
Dgate.S35 [1:](pr)brl.cond.sptk 0; \
131 (p1) br.cond.spnt setup_rbs // yup -> (clobbers p8, r14-r16, and r18-r20)
171 (p1) br.cond.spnt restore_rbs // yup -> (clobbers r14-r18, f6 & f7)
225 br.cond.sptk back_from_setup_rbs
297 br.cond.sptk back_from_restore_rbs
/arch/arm64/include/asm/
Dalternative-macros.h201 .macro user_alt, label, oldinstr, newinstr, cond
202 9999: alternative_insn "\oldinstr", "\newinstr", \cond

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