Searched refs:omap_hwmod_write (Results 1 – 7 of 7) sorted by relevance
/arch/arm/mach-omap2/ |
D | omap_hwmod_reset.c | 75 omap_hwmod_write(OMAP_RTC_KICK0_VALUE, oh, OMAP_RTC_KICK0_REG); in omap_hwmod_rtc_unlock() 76 omap_hwmod_write(OMAP_RTC_KICK1_VALUE, oh, OMAP_RTC_KICK1_REG); in omap_hwmod_rtc_unlock() 95 omap_hwmod_write(0x0, oh, OMAP_RTC_KICK0_REG); in omap_hwmod_rtc_lock() 96 omap_hwmod_write(0x0, oh, OMAP_RTC_KICK1_REG); in omap_hwmod_rtc_lock()
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D | display.c | 346 omap_hwmod_write(irq_mask, oh, DISPC_IRQSTATUS); in dispc_disable_outputs() 351 omap_hwmod_write(v, oh, DISPC_CONTROL); in dispc_disable_outputs() 357 omap_hwmod_write(v, oh, DISPC_CONTROL2); in dispc_disable_outputs() 364 omap_hwmod_write(v, oh, DISPC_CONTROL3); in dispc_disable_outputs() 398 omap_hwmod_write(0x0, oh, DSS_SDI_CONTROL); in omap_dss_reset() 399 omap_hwmod_write(0x0, oh, DSS_PLL_CONTROL); in omap_dss_reset() 406 omap_hwmod_write(0x0, oh, DSS_CONTROL); in omap_dss_reset()
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D | msdi.c | 56 omap_hwmod_write(v, oh, MSDI_CON_OFFSET); in omap_msdi_reset() 72 omap_hwmod_write(v, oh, MSDI_CON_OFFSET); in omap_msdi_reset()
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D | i2c.c | 50 omap_hwmod_write(v, oh, i2c_con); in omap_i2c_reset() 58 omap_hwmod_write(v, oh, i2c_con); in omap_i2c_reset()
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D | hdq1w.c | 48 omap_hwmod_write(v, oh, HDQ_CTRL_STATUS_OFFSET); in omap_hdq1w_reset()
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D | omap_hwmod.h | 635 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs);
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D | omap_hwmod.c | 316 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs); in _write_sysconfig() 2929 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs) in omap_hwmod_write() function
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