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Searched refs:sar_base (Results 1 – 3 of 3) sorted by relevance

/arch/arm/mach-omap2/
Domap-mpuss-lowpower.c61 static void __iomem *sar_base; variable
199 if (l2x0_base && sar_base) { in save_l2x0_context()
201 sar_base + L2X0_AUXCTRL_OFFSET); in save_l2x0_context()
203 sar_base + L2X0_PREFETCH_CTRL_OFFSET); in save_l2x0_context()
366 if (sar_base) { in omap4_mpuss_init()
367 pm_info->scu_sar_addr = sar_base + SCU_OFFSET0; in omap4_mpuss_init()
369 pm_info->wkup_sar_addr = sar_base + in omap4_mpuss_init()
372 pm_info->wkup_sar_addr = sar_base + in omap4_mpuss_init()
374 pm_info->l2x0_sar_addr = sar_base + L2X0_SAVE_OFFSET0; in omap4_mpuss_init()
390 if (sar_base) { in omap4_mpuss_init()
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Domap-wakeupgen.c54 static void __iomem *sar_base; variable
89 writel_relaxed(val, sar_base + offset + (idx * 4)); in sar_writel()
265 writel_relaxed(val, sar_base + AUXCOREBOOT0_OFFSET); in omap4_irq_save_context()
267 writel_relaxed(val, sar_base + AUXCOREBOOT1_OFFSET); in omap4_irq_save_context()
271 writel_relaxed(val, sar_base + PTMSYNCREQ_MASK_OFFSET); in omap4_irq_save_context()
273 writel_relaxed(val, sar_base + PTMSYNCREQ_EN_OFFSET); in omap4_irq_save_context()
276 val = readl_relaxed(sar_base + SAR_BACKUP_STATUS_OFFSET); in omap4_irq_save_context()
278 writel_relaxed(val, sar_base + SAR_BACKUP_STATUS_OFFSET); in omap4_irq_save_context()
298 writel_relaxed(val, sar_base + OMAP5_AUXCOREBOOT0_OFFSET); in omap5_irq_save_context()
300 writel_relaxed(val, sar_base + OMAP5_AUXCOREBOOT1_OFFSET); in omap5_irq_save_context()
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Domap4-common.c274 unsigned long sar_base; in omap4_sar_ram_init() local
281 sar_base = OMAP44XX_SAR_RAM_BASE; in omap4_sar_ram_init()
283 sar_base = OMAP54XX_SAR_RAM_BASE; in omap4_sar_ram_init()
288 sar_ram_base = ioremap(sar_base, SZ_16K); in omap4_sar_ram_init()