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Searched refs:vcpu_cpsr (Results 1 – 8 of 8) sorted by relevance

/arch/arm64/kvm/hyp/
Daarch32.c62 cpsr = *vcpu_cpsr(vcpu); in kvm_condition_valid32()
99 unsigned long cpsr = *vcpu_cpsr(vcpu); in kvm_adjust_itstate()
119 *vcpu_cpsr(vcpu) = cpsr; in kvm_adjust_itstate()
131 is_thumb = !!(*vcpu_cpsr(vcpu) & PSR_AA32_T_BIT); in kvm_skip_instr32()
Dexception.c86 mode = *vcpu_cpsr(vcpu) & (PSR_MODE_MASK | PSR_MODE32_BIT); in enter_exception64()
110 old = *vcpu_cpsr(vcpu); in enter_exception64()
153 *vcpu_cpsr(vcpu) = new; in enter_exception64()
180 old = *vcpu_cpsr(vcpu); in get_except32_cpsr()
271 unsigned long spsr = *vcpu_cpsr(vcpu); in enter_exception32()
276 *vcpu_cpsr(vcpu) = get_except32_cpsr(vcpu, mode); in enter_exception32()
/arch/arm64/include/asm/
Dkvm_emulate.h135 static __always_inline unsigned long *vcpu_cpsr(const struct kvm_vcpu *vcpu) in vcpu_cpsr() function
142 return !!(*vcpu_cpsr(vcpu) & PSR_MODE32_BIT); in vcpu_mode_is_32bit()
155 *vcpu_cpsr(vcpu) |= PSR_AA32_T_BIT; in vcpu_set_thumb()
213 mode = *vcpu_cpsr(vcpu) & PSR_AA32_MODE_MASK; in vcpu_mode_priv()
217 mode = *vcpu_cpsr(vcpu) & PSR_MODE_MASK; in vcpu_mode_priv()
401 *vcpu_cpsr(vcpu) |= PSR_AA32_E_BIT; in kvm_vcpu_set_be()
412 return !!(*vcpu_cpsr(vcpu) & PSR_AA32_E_BIT); in kvm_vcpu_is_be()
/arch/arm64/kvm/hyp/include/hyp/
Dadjust_pc.h24 *vcpu_cpsr(vcpu) &= ~PSR_BTYPE_MASK; in kvm_skip_instr()
28 *vcpu_cpsr(vcpu) &= ~DBG_SPSR_SS; in kvm_skip_instr()
/arch/arm64/kvm/
Ddebug.c194 *vcpu_cpsr(vcpu) |= DBG_SPSR_SS; in kvm_arm_setup_debug()
204 trace_kvm_arm_set_dreg32("SPSR_EL2", *vcpu_cpsr(vcpu)); in kvm_arm_setup_debug()
Dinject_fault.c19 unsigned long cpsr = *vcpu_cpsr(vcpu); in inject_abt64()
Dguest.c253 if (*vcpu_cpsr(vcpu) & PSR_MODE32_BIT) { in set_core_reg()
256 switch (*vcpu_cpsr(vcpu)) { in set_core_reg()
Dsys_regs.c2169 cp, *vcpu_pc(vcpu), *vcpu_cpsr(vcpu)); in unhandled_cp_access()
2294 *vcpu_pc(vcpu), *vcpu_cpsr(vcpu)); in emulate_sys_reg()