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Searched refs:ARM_SMMU_CB_S1_MAIR0 (Results 1 – 3 of 3) sorted by relevance

/drivers/iommu/arm/arm-smmu/
Darm-smmu.h190 #define ARM_SMMU_CB_S1_MAIR0 0x38 macro
Dqcom_iommu.c298 iommu_writel(ctx, ARM_SMMU_CB_S1_MAIR0, in qcom_iommu_init_domain()
Darm-smmu.c589 arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_S1_MAIR0, cb->mair[0]); in arm_smmu_write_context_bank()