Home
last modified time | relevance | path

Searched refs:DC_WR_CH_CONF (Results 1 – 1 of 1) sorted by relevance

/drivers/gpu/ipu-v3/
Dipu-dc.c44 #define DC_WR_CH_CONF 0x0 macro
212 reg = readl(dc->base + DC_WR_CH_CONF); in ipu_dc_init_sync()
217 writel(reg, dc->base + DC_WR_CH_CONF); in ipu_dc_init_sync()
245 reg = readl(dc->base + DC_WR_CH_CONF); in ipu_dc_enable_channel()
247 writel(reg, dc->base + DC_WR_CH_CONF); in ipu_dc_enable_channel()
255 val = readl(dc->base + DC_WR_CH_CONF); in ipu_dc_disable_channel()
257 writel(val, dc->base + DC_WR_CH_CONF); in ipu_dc_disable_channel()
367 priv->channels[1].base + DC_WR_CH_CONF); in ipu_dc_init()
369 priv->channels[5].base + DC_WR_CH_CONF); in ipu_dc_init()