Searched refs:DWB_OGAM_RAMA_START_CNTL_R (Results 1 – 2 of 2) sorted by relevance
/drivers/gpu/drm/amd/display/dc/dcn30/ |
D | dcn30_dwb.h | 85 SR(DWB_OGAM_RAMA_START_CNTL_R),\ 242 SF_DWB2(DWB_OGAM_RAMA_START_CNTL_R, DWBCP, 0, DWB_OGAM_RAMA_EXP_REGION_START_R, mask_sh),\ 243 SF_DWB2(DWB_OGAM_RAMA_START_CNTL_R, DWBCP, 0, DWB_OGAM_RAMA_EXP_REGION_START_SEGMENT_R, mask_sh),\ 790 uint32_t DWB_OGAM_RAMA_START_CNTL_R; member
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D | dcn30_dwb_cm.c | 91 gam_regs.start_cntl_r = REG(DWB_OGAM_RAMA_START_CNTL_R); in dwb3_program_ogam_luta_settings()
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