Home
last modified time | relevance | path

Searched refs:INIT_TP_WR_CPL (Results 1 – 5 of 5) sorted by relevance

/drivers/net/ethernet/chelsio/cxgb4/
Dcxgb4_uld.h70 #define INIT_TP_WR_CPL(w, cpl, tid) do { \ macro
Dcxgb4_filter.c68 INIT_TP_WR_CPL(req, CPL_SET_TCB_FIELD, ftid); in set_tcb_field()
/drivers/net/ethernet/chelsio/inline_crypto/chtls/
Dchtls_hw.c29 INIT_TP_WR_CPL(req, CPL_SET_TCB_FIELD, csk->tid); in __set_tcb_field_direct()
Dchtls_cm.c236 INIT_TP_WR_CPL(req, CPL_ABORT_REQ, csk->tid); in chtls_send_abort()
1274 INIT_TP_WR_CPL(req, CPL_TID_RELEASE, tid); in mk_tid_release()
1983 INIT_TP_WR_CPL(rpl, CPL_ABORT_RPL, tid); in set_abort_rpl_wr()
/drivers/net/ethernet/chelsio/inline_crypto/ch_ktls/
Dchcr_ktls.c342 INIT_TP_WR_CPL(req, CPL_SET_TCB_FIELD, tx_info->tid); in chcr_set_tcb_field()