Home
last modified time | relevance | path

Searched refs:IPU_CHA_BUF1_RDY (Results 1 – 4 of 4) sorted by relevance

/drivers/dma/ipu/
Dipu_intern.h19 #define IPU_CHA_BUF1_RDY 0x08 macro
Dipu_idmac.c82 idmac_read_ipureg(ipu, IPU_CHA_BUF1_RDY), in dump_idmac_reg()
718 idmac_write_ipureg(&ipu_data, 1UL << channel, IPU_CHA_BUF1_RDY); in ipu_select_buffer()
750 reg = idmac_read_ipureg(&ipu_data, IPU_CHA_BUF1_RDY); in ipu_update_channel_buffer()
1093 idmac_read_ipureg(ipu, IPU_CHA_BUF1_RDY), in ipu_disable_channel()
1173 ready1 = idmac_read_ipureg(&ipu_data, IPU_CHA_BUF1_RDY); in idmac_interrupt()
/drivers/gpu/ipu-v3/
Dipu-common.c443 reg = ipu_cm_read(ipu, IPU_CHA_BUF1_RDY(channel->num)); in ipu_idmac_buffer_is_ready()
467 ipu_cm_write(ipu, idma_mask(chno), IPU_CHA_BUF1_RDY(chno)); in ipu_idmac_select_buffer()
487 ipu_cm_write(ipu, idma_mask(chno), IPU_CHA_BUF1_RDY(chno)); in ipu_idmac_clear_buffer()
566 if (ipu_cm_read(ipu, IPU_CHA_BUF1_RDY(channel->num)) & in ipu_idmac_disable_channel()
569 IPU_CHA_BUF1_RDY(channel->num)); in ipu_idmac_disable_channel()
Dipu-prv.h61 #define IPU_CHA_BUF1_RDY(ch) IPU_CM_REG(0x0270 + 4 * ((ch) / 32)) macro