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Searched refs:MDFLD_P1_MASK (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/gma500/
Dpsb_intel_reg.h798 #define MDFLD_P1_MASK (0x1FF << 17) macro
Dmdfld_intel_display.c895 dpll &= ~MDFLD_P1_MASK; in mdfld_crtc_mode_set()