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Searched refs:MTK_PIN_DRV_GRP (Results 1 – 8 of 8) sorted by relevance

/drivers/pinctrl/mediatek/
Dpinctrl-mt2701.c48 MTK_PIN_DRV_GRP(0, 0xf50, 0, 1),
49 MTK_PIN_DRV_GRP(1, 0xf50, 0, 1),
50 MTK_PIN_DRV_GRP(2, 0xf50, 0, 1),
51 MTK_PIN_DRV_GRP(3, 0xf50, 0, 1),
52 MTK_PIN_DRV_GRP(4, 0xf50, 0, 1),
53 MTK_PIN_DRV_GRP(5, 0xf50, 0, 1),
54 MTK_PIN_DRV_GRP(6, 0xf50, 0, 1),
55 MTK_PIN_DRV_GRP(7, 0xf50, 4, 1),
56 MTK_PIN_DRV_GRP(8, 0xf50, 4, 1),
57 MTK_PIN_DRV_GRP(9, 0xf50, 4, 1),
[all …]
Dpinctrl-mt2712.c311 MTK_PIN_DRV_GRP(0, 0xc10, 4, 0),
312 MTK_PIN_DRV_GRP(1, 0xc10, 4, 0),
313 MTK_PIN_DRV_GRP(2, 0xc10, 4, 0),
314 MTK_PIN_DRV_GRP(3, 0xc10, 4, 0),
316 MTK_PIN_DRV_GRP(4, 0xc00, 12, 0),
317 MTK_PIN_DRV_GRP(5, 0xc00, 12, 0),
318 MTK_PIN_DRV_GRP(6, 0xc00, 12, 0),
319 MTK_PIN_DRV_GRP(7, 0xc00, 12, 0),
321 MTK_PIN_DRV_GRP(8, 0xc10, 0, 0),
322 MTK_PIN_DRV_GRP(9, 0xc10, 0, 0),
[all …]
Dpinctrl-mt8127.c29 MTK_PIN_DRV_GRP(0, 0xb00, 0, 1),
30 MTK_PIN_DRV_GRP(1, 0xb00, 0, 1),
31 MTK_PIN_DRV_GRP(2, 0xb00, 0, 1),
32 MTK_PIN_DRV_GRP(3, 0xb00, 0, 1),
33 MTK_PIN_DRV_GRP(4, 0xb00, 0, 1),
34 MTK_PIN_DRV_GRP(5, 0xb00, 0, 1),
35 MTK_PIN_DRV_GRP(6, 0xb00, 0, 1),
36 MTK_PIN_DRV_GRP(7, 0xb00, 12, 1),
37 MTK_PIN_DRV_GRP(8, 0xb00, 12, 1),
38 MTK_PIN_DRV_GRP(9, 0xb00, 12, 1),
[all …]
Dpinctrl-mt8173.c199 MTK_PIN_DRV_GRP(0, DRV_BASE+0x20, 12, 0),
200 MTK_PIN_DRV_GRP(1, DRV_BASE+0x20, 12, 0),
201 MTK_PIN_DRV_GRP(2, DRV_BASE+0x20, 12, 0),
202 MTK_PIN_DRV_GRP(3, DRV_BASE+0x20, 12, 0),
203 MTK_PIN_DRV_GRP(4, DRV_BASE+0x20, 12, 0),
204 MTK_PIN_DRV_GRP(5, DRV_BASE+0x30, 0, 0),
205 MTK_PIN_DRV_GRP(6, DRV_BASE+0x30, 0, 0),
206 MTK_PIN_DRV_GRP(7, DRV_BASE+0x30, 0, 0),
207 MTK_PIN_DRV_GRP(8, DRV_BASE+0x30, 0, 0),
208 MTK_PIN_DRV_GRP(9, DRV_BASE+0x30, 0, 0),
[all …]
Dpinctrl-mt8135.c60 MTK_PIN_DRV_GRP(0, DRV_BASE1, 0, 0),
61 MTK_PIN_DRV_GRP(1, DRV_BASE1, 0, 0),
62 MTK_PIN_DRV_GRP(2, DRV_BASE1, 0, 0),
63 MTK_PIN_DRV_GRP(3, DRV_BASE1, 0, 0),
64 MTK_PIN_DRV_GRP(4, DRV_BASE1, 4, 0),
65 MTK_PIN_DRV_GRP(5, DRV_BASE1, 8, 0),
66 MTK_PIN_DRV_GRP(6, DRV_BASE1, 0, 0),
67 MTK_PIN_DRV_GRP(7, DRV_BASE1, 0, 0),
68 MTK_PIN_DRV_GRP(8, DRV_BASE1, 0, 0),
69 MTK_PIN_DRV_GRP(9, DRV_BASE1, 0, 0),
[all …]
Dpinctrl-mt8167.c28 MTK_PIN_DRV_GRP(0, 0xd00, 0, 0),
29 MTK_PIN_DRV_GRP(1, 0xd00, 0, 0),
30 MTK_PIN_DRV_GRP(2, 0xd00, 0, 0),
31 MTK_PIN_DRV_GRP(3, 0xd00, 0, 0),
32 MTK_PIN_DRV_GRP(4, 0xd00, 0, 0),
34 MTK_PIN_DRV_GRP(5, 0xd00, 4, 0),
35 MTK_PIN_DRV_GRP(6, 0xd00, 4, 0),
36 MTK_PIN_DRV_GRP(7, 0xd00, 4, 0),
37 MTK_PIN_DRV_GRP(8, 0xd00, 4, 0),
38 MTK_PIN_DRV_GRP(9, 0xd00, 4, 0),
[all …]
Dpinctrl-mt8516.c28 MTK_PIN_DRV_GRP(0, 0xd00, 0, 0),
29 MTK_PIN_DRV_GRP(1, 0xd00, 0, 0),
30 MTK_PIN_DRV_GRP(2, 0xd00, 0, 0),
31 MTK_PIN_DRV_GRP(3, 0xd00, 0, 0),
32 MTK_PIN_DRV_GRP(4, 0xd00, 0, 0),
34 MTK_PIN_DRV_GRP(5, 0xd00, 4, 0),
35 MTK_PIN_DRV_GRP(6, 0xd00, 4, 0),
36 MTK_PIN_DRV_GRP(7, 0xd00, 4, 0),
37 MTK_PIN_DRV_GRP(8, 0xd00, 4, 0),
38 MTK_PIN_DRV_GRP(9, 0xd00, 4, 0),
[all …]
Dpinctrl-mtk-common.h109 #define MTK_PIN_DRV_GRP(_pin, _offset, _bit, _grp) \ macro