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Searched refs:NVReadRAMDAC (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/nouveau/dispnv04/
Dhw.c188 uint32_t ramdac580 = NVReadRAMDAC(dev, 0, NV_PRAMDAC_580); in nouveau_hw_get_pllvals()
400 regp->nv10_cursync = NVReadRAMDAC(dev, head, NV_RAMDAC_NV10_CURSYNC); in nv_save_state_ramdac()
403 state->pllsel = NVReadRAMDAC(dev, 0, NV_PRAMDAC_PLL_COEFF_SELECT); in nv_save_state_ramdac()
405 state->sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK); in nv_save_state_ramdac()
407 regp->dither = NVReadRAMDAC(dev, head, NV_RAMDAC_DITHER_NV11); in nv_save_state_ramdac()
409 regp->ramdac_gen_ctrl = NVReadRAMDAC(dev, head, NV_PRAMDAC_GENERAL_CONTROL); in nv_save_state_ramdac()
412 regp->ramdac_630 = NVReadRAMDAC(dev, head, NV_PRAMDAC_630); in nv_save_state_ramdac()
414 regp->ramdac_634 = NVReadRAMDAC(dev, head, NV_PRAMDAC_634); in nv_save_state_ramdac()
416 regp->tv_setup = NVReadRAMDAC(dev, head, NV_PRAMDAC_TV_SETUP); in nv_save_state_ramdac()
417 regp->tv_vtotal = NVReadRAMDAC(dev, head, NV_PRAMDAC_TV_VTOTAL); in nv_save_state_ramdac()
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Ddac.c160 saved_rtest_ctrl = NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL); in nv04_dac_detect()
178 saved_rgen_ctrl = NVReadRAMDAC(dev, 0, NV_PRAMDAC_GENERAL_CONTROL); in nv04_dac_detect()
260 saved_rtest_ctrl = NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset); in nv17_dac_sample_load()
281 saved_routput = NVReadRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + regoffset); in nv17_dac_sample_load()
301 temp = NVReadRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + regoffset); in nv17_dac_sample_load()
306 temp = NVReadRAMDAC(dev, head, NV_PRAMDAC_TEST_CONTROL); in nv17_dac_sample_load()
311 sample = NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset); in nv17_dac_sample_load()
313 sample &= NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset); in nv17_dac_sample_load()
315 temp = NVReadRAMDAC(dev, head, NV_PRAMDAC_TEST_CONTROL); in nv17_dac_sample_load()
399 otherdac = NVReadRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + dac_offset); in nv04_dac_mode_set()
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Dtvnv17.c61 dacclk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + regoffset); in nv42_tv_sample_load()
67 fp_htotal = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_HTOTAL); in nv42_tv_sample_load()
68 fp_hsync_start = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_START); in nv42_tv_sample_load()
69 fp_hsync_end = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_END); in nv42_tv_sample_load()
70 fp_control = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_TG_CONTROL); in nv42_tv_sample_load()
71 test_ctrl = NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset); in nv42_tv_sample_load()
72 ctv_1c = NVReadRAMDAC(dev, head, 0x680c1c); in nv42_tv_sample_load()
73 ctv_14 = NVReadRAMDAC(dev, head, 0x680c14); in nv42_tv_sample_load()
74 ctv_6c = NVReadRAMDAC(dev, head, 0x680c6c); in nv42_tv_sample_load()
104 sample |= NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset) in nv42_tv_sample_load()
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Dhw.h79 static inline uint32_t NVReadRAMDAC(struct drm_device *dev, in NVReadRAMDAC() function
106 return NVReadRAMDAC(dev, ramdac, NV_PRAMDAC_FP_TMDS_DATA + dl * 8); in nv_read_tmds()
348 uint32_t curpos = NVReadRAMDAC(dev, head, NV_PRAMDAC_CU_START_POS); in nv_fix_nv40_hw_cursor()
Ddfp.c65 return ((NVReadRAMDAC(dev, ramdac, NV_PRAMDAC_FP_TMDS_DATA) & 0x8) >> 3) ^ ramdac; in nv04_dfp_get_bound_head()
97 if (NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_TG_CONTROL) & in nv04_dfp_disable()
465 NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_TG_CONTROL); in nv04_dfp_commit()
555 nv04_display(dev)->mode_reg.sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK); in nv04_lvds_dpms()
Dcrtc.c720 uint32_t reg900 = NVReadRAMDAC(dev, nv_crtc->index, NV_PRAMDAC_900); in nv_crtc_prepare()
/drivers/gpu/drm/nouveau/
Dnouveau_bios.c248 sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK) & ~0x50000; in call_lvds_script()
672 sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK) & ~0x50000; in run_tmds_table()