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Searched refs:PSB_WVDC32 (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/gma500/
Doaktrail_device.c262 PSB_WVDC32(0, PP_CONTROL); in oaktrail_save_display_registers()
269 PSB_WVDC32(0x58000000, DSPACNTR); in oaktrail_save_display_registers()
271 PSB_WVDC32(0, DSPASURF); in oaktrail_save_display_registers()
277 PSB_WVDC32(0x0, PIPEACONF); in oaktrail_save_display_registers()
282 PSB_WVDC32(0, MRST_DPLL_A); in oaktrail_save_display_registers()
302 PSB_WVDC32(regs->psb.saveDSPARB, DSPARB); in oaktrail_restore_display_registers()
303 PSB_WVDC32(regs->psb.saveDSPFW1, DSPFW1); in oaktrail_restore_display_registers()
304 PSB_WVDC32(regs->psb.saveDSPFW2, DSPFW2); in oaktrail_restore_display_registers()
305 PSB_WVDC32(regs->psb.saveDSPFW3, DSPFW3); in oaktrail_restore_display_registers()
306 PSB_WVDC32(regs->psb.saveDSPFW4, DSPFW4); in oaktrail_restore_display_registers()
[all …]
Dmdfld_device.c271 PSB_WVDC32(0x80000000, VGACNTRL); in mdfld_restore_display_registers()
274 PSB_WVDC32(dpll_val & ~DPLL_VCO_ENABLE, map->dpll); in mdfld_restore_display_registers()
277 PSB_WVDC32(pipe->fp0, map->fp0); in mdfld_restore_display_registers()
288 PSB_WVDC32(dpll, map->dpll); in mdfld_restore_display_registers()
293 PSB_WVDC32(pipe->fp0, map->fp0); in mdfld_restore_display_registers()
294 PSB_WVDC32(dpll_val, map->dpll); in mdfld_restore_display_registers()
299 PSB_WVDC32(dpll_val, map->dpll); in mdfld_restore_display_registers()
317 PSB_WVDC32(pipe->htotal, map->htotal); in mdfld_restore_display_registers()
318 PSB_WVDC32(pipe->hblank, map->hblank); in mdfld_restore_display_registers()
319 PSB_WVDC32(pipe->hsync, map->hsync); in mdfld_restore_display_registers()
[all …]
Dpsb_irq.c82 PSB_WVDC32(writeVal, reg); in psb_enable_pipestat()
98 PSB_WVDC32(writeVal, reg); in psb_disable_pipestat()
110 PSB_WVDC32(~dev_priv->vdc_irq_mask, PSB_INT_MASK_R); in mid_enable_pipe_event()
111 PSB_WVDC32(dev_priv->vdc_irq_mask, PSB_INT_ENABLE_R); in mid_enable_pipe_event()
122 PSB_WVDC32(~dev_priv->vdc_irq_mask, PSB_INT_MASK_R); in mid_disable_pipe_event()
123 PSB_WVDC32(dev_priv->vdc_irq_mask, PSB_INT_ENABLE_R); in mid_disable_pipe_event()
156 PSB_WVDC32(PSB_RVDC32(pipe_stat_reg), pipe_stat_reg); in mid_pipe_event_handler()
299 PSB_WVDC32(vdc_stat, PSB_INT_IDENTITY_R); in psb_irq_handler()
318 PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM); in psb_irq_preinstall()
319 PSB_WVDC32(0x00000000, PSB_INT_MASK_R); in psb_irq_preinstall()
[all …]
Doaktrail_hdmi.c798 PSB_WVDC32(hdmi_dev->saveDPLL_CTRL, DPLL_CTRL); in oaktrail_hdmi_restore()
799 PSB_WVDC32(hdmi_dev->saveDPLL_DIV_CTRL, DPLL_DIV_CTRL); in oaktrail_hdmi_restore()
800 PSB_WVDC32(hdmi_dev->saveDPLL_ADJUST, DPLL_ADJUST); in oaktrail_hdmi_restore()
801 PSB_WVDC32(hdmi_dev->saveDPLL_UPDATE, DPLL_UPDATE); in oaktrail_hdmi_restore()
802 PSB_WVDC32(hdmi_dev->saveDPLL_CLK_ENABLE, DPLL_CLK_ENABLE); in oaktrail_hdmi_restore()
806 PSB_WVDC32(pipeb->src, PIPEBSRC); in oaktrail_hdmi_restore()
807 PSB_WVDC32(pipeb->htotal, HTOTAL_B); in oaktrail_hdmi_restore()
808 PSB_WVDC32(pipeb->hblank, HBLANK_B); in oaktrail_hdmi_restore()
809 PSB_WVDC32(pipeb->hsync, HSYNC_B); in oaktrail_hdmi_restore()
810 PSB_WVDC32(pipeb->vtotal, VTOTAL_B); in oaktrail_hdmi_restore()
[all …]
Dpsb_device.c214 PSB_WVDC32(regs->saveDSPARB, DSPARB); in psb_restore_display_registers()
215 PSB_WVDC32(regs->saveDSPFW1, DSPFW1); in psb_restore_display_registers()
216 PSB_WVDC32(regs->saveDSPFW2, DSPFW2); in psb_restore_display_registers()
217 PSB_WVDC32(regs->saveDSPFW3, DSPFW3); in psb_restore_display_registers()
218 PSB_WVDC32(regs->saveDSPFW4, DSPFW4); in psb_restore_display_registers()
219 PSB_WVDC32(regs->saveDSPFW5, DSPFW5); in psb_restore_display_registers()
220 PSB_WVDC32(regs->saveDSPFW6, DSPFW6); in psb_restore_display_registers()
221 PSB_WVDC32(regs->saveCHICKENBIT, DSPCHICKENBIT); in psb_restore_display_registers()
224 PSB_WVDC32(0x80000000, VGACNTRL); in psb_restore_display_registers()
Dpsb_drv.c360 PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM); in psb_driver_load()
361 PSB_WVDC32(0x00000000, PSB_INT_ENABLE_R); in psb_driver_load()
362 PSB_WVDC32(0xFFFFFFFF, PSB_INT_MASK_R); in psb_driver_load()
Dgtt.c399 PSB_WVDC32(dev_priv->pge_ctl, PSB_PGETBL_CTL); in psb_gtt_takedown()
432 PSB_WVDC32(dev_priv->pge_ctl | _PSB_PGETBL_ENABLED, PSB_PGETBL_CTL); in psb_gtt_init()
Dpower.c110 PSB_WVDC32(dev_priv->pge_ctl | _PSB_PGETBL_ENABLED, PSB_PGETBL_CTL); in gma_resume_display()
Dpsb_drv.h890 #define PSB_WVDC32(_val, _offs) iowrite32(_val, dev_priv->vdc_reg + (_offs)) macro