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Searched refs:VIA_PCI_DMA_CSR1 (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/via/
Dvia_dmablit.h113 #define VIA_PCI_DMA_CSR1 0xE94 /* Command/Status Register of Channel 1 */ macro
Dvia_irq.c77 {VIA_IRQ_DMA1_TD_ENABLE, VIA_IRQ_DMA1_TD_PENDING, VIA_PCI_DMA_CSR1,
86 {VIA_IRQ_DMA1_TD_ENABLE, VIA_IRQ_DMA1_TD_PENDING, VIA_PCI_DMA_CSR1,