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Searched refs:cfg_base (Results 1 – 9 of 9) sorted by relevance

/drivers/net/can/sja1000/
Dpeak_pci.c35 void __iomem *cfg_base; /* Common for all channels */ member
142 void __iomem *cfg_base; /* Common for all channels */ member
160 u8 gp_outen = readb(card->cfg_base + PITA_GPOEN) & ~PITA_GPIN_SCL; in pita_set_scl_highz()
161 writeb(gp_outen, card->cfg_base + PITA_GPOEN); in pita_set_scl_highz()
166 u8 gp_outen = readb(card->cfg_base + PITA_GPOEN) & ~PITA_GPIN_SDA; in pita_set_sda_highz()
167 writeb(gp_outen, card->cfg_base + PITA_GPOEN); in pita_set_sda_highz()
183 gp_out = readb(card->cfg_base + PITA_GPOUT) & ~PITA_GPIN_SDA; in pita_setsda()
184 writeb(gp_out, card->cfg_base + PITA_GPOUT); in pita_setsda()
187 gp_outen = readb(card->cfg_base + PITA_GPOEN); in pita_setsda()
193 writeb(gp_outen, card->cfg_base + PITA_GPOEN); in pita_setsda()
[all …]
/drivers/ide/
Dtrm290.c237 unsigned int cfg_base = pci_resource_start(dev, 4); in init_hwif_trm290() local
241 if ((dev->class & 5) && cfg_base) in init_hwif_trm290()
244 cfg_base = 0x3df0; in init_hwif_trm290()
247 printk(KERN_CONT " config base at 0x%04x\n", cfg_base); in init_hwif_trm290()
248 hwif->config_data = cfg_base; in init_hwif_trm290()
249 hwif->dma_base = (cfg_base + 4) ^ (hwif->channel ? 0x80 : 0); in init_hwif_trm290()
/drivers/pci/controller/
Dpci-xgene.c69 void __iomem *cfg_base; member
110 return port->cfg_base + AXI_EP_CFG_ACCESS; in xgene_pcie_get_cfg_base()
112 return port->cfg_base; in xgene_pcie_get_cfg_base()
247 port->cfg_base = cfg->win; in xgene_pcie_ecam_init()
359 port->cfg_base = devm_ioremap_resource(dev, res); in xgene_pcie_map_reg()
360 if (IS_ERR(port->cfg_base)) in xgene_pcie_map_reg()
361 return PTR_ERR(port->cfg_base); in xgene_pcie_map_reg()
486 void __iomem *cfg_base = port->cfg_base; in xgene_pcie_setup_ib_reg() local
511 bar_addr = cfg_base + PCI_BASE_ADDRESS_0; in xgene_pcie_setup_ib_reg()
/drivers/pci/controller/dwc/
Dpci-meson.c69 void __iomem *cfg_base; member
117 mp->cfg_base = devm_platform_ioremap_resource_byname(pdev, "cfg"); in meson_pcie_get_mems()
118 if (IS_ERR(mp->cfg_base)) in meson_pcie_get_mems()
119 return PTR_ERR(mp->cfg_base); in meson_pcie_get_mems()
219 return readl(mp->cfg_base + reg); in meson_cfg_readl()
224 writel(val, mp->cfg_base + reg); in meson_cfg_writel()
/drivers/soc/ti/
Dpruss.c87 reg = pruss->cfg_base + reg_offset; in pruss_clk_mux_setup()
260 pruss->cfg_base = devm_ioremap(dev, res.start, resource_size(&res)); in pruss_probe()
261 if (!pruss->cfg_base) { in pruss_probe()
270 pruss->cfg_regmap = devm_regmap_init_mmio(dev, pruss->cfg_base, in pruss_probe()
/drivers/gpu/drm/i915/gvt/
Dcfg_space.c71 u8 *cfg_base = vgpu_cfg_space(vgpu); in vgpu_pci_cfg_mem_write() local
78 old = cfg_base[off + i]; in vgpu_pci_cfg_mem_write()
89 cfg_base[off + i] = (old & ~mask) | new; in vgpu_pci_cfg_mem_write()
94 memcpy(cfg_base + off + i, src + i, bytes - i); in vgpu_pci_cfg_mem_write()
/drivers/pci/controller/cadence/
Dpcie-cadence-host.c73 return rc->cfg_base + (where & 0xfff); in cdns_pci_map_bus()
522 rc->cfg_base = devm_pci_remap_cfg_resource(dev, res); in cdns_pcie_host_setup()
523 if (IS_ERR(rc->cfg_base)) in cdns_pcie_host_setup()
524 return PTR_ERR(rc->cfg_base); in cdns_pcie_host_setup()
Dpcie-cadence.h307 void __iomem *cfg_base; member
/drivers/net/usb/
Dsmsc75xx.c1535 int cfg_base = WUF_CFGX + filter * 4; in smsc75xx_write_wuff() local
1539 ret = smsc75xx_write_reg(dev, cfg_base, wuf_cfg); in smsc75xx_write_wuff()