/drivers/mtd/nand/raw/ |
D | nand_base.c | 1013 struct nand_op_instr instrs[] = { in nand_sp_exec_read_page_op() local 1020 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_sp_exec_read_page_op() 1028 instrs[0].ctx.cmd.opcode = NAND_CMD_READOOB; in nand_sp_exec_read_page_op() 1031 instrs[0].ctx.cmd.opcode = NAND_CMD_READ1; in nand_sp_exec_read_page_op() 1042 instrs[1].ctx.addr.naddrs++; in nand_sp_exec_read_page_op() 1055 struct nand_op_instr instrs[] = { in nand_lp_exec_read_page_op() local 1063 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_lp_exec_read_page_op() 1079 instrs[1].ctx.addr.naddrs++; in nand_lp_exec_read_page_op() 1151 struct nand_op_instr instrs[] = { in nand_read_param_page_op() local 1158 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_read_param_page_op() [all …]
|
D | fsl_upm.c | 148 ret = func_exec_instr(chip, &op->instrs[i]); in fun_exec_op() 152 if (op->instrs[i].delay_ns) in fun_exec_op() 153 ndelay(op->instrs[i].delay_ns); in fun_exec_op()
|
D | nand_hynix.c | 75 struct nand_op_instr instrs[] = { in hynix_nand_cmd_op() local 78 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in hynix_nand_cmd_op() 93 struct nand_op_instr instrs[] = { in hynix_nand_reg_write_op() local 97 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in hynix_nand_reg_write_op()
|
D | gpio.c | 151 ret = gpio_nand_exec_instr(chip, &op->instrs[i]); in gpio_nand_exec_op() 155 if (op->instrs[i].delay_ns) in gpio_nand_exec_op() 156 ndelay(op->instrs[i].delay_ns); in gpio_nand_exec_op()
|
D | nand_macronix.c | 254 struct nand_op_instr instrs[] = { in nand_power_down_op() local 258 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_power_down_op()
|
D | nand_toshiba.c | 37 struct nand_op_instr instrs[] = { in toshiba_nand_benand_read_eccstatus_op() local 42 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in toshiba_nand_benand_read_eccstatus_op()
|
D | arasan-nand-controller.c | 550 instr = &subop->instrs[op_id]; in anfc_parse_instructions() 739 if (subop->instrs[0].ctx.cmd.opcode != NAND_CMD_STATUS) in anfc_status_type_exec() 747 memcpy(subop->instrs[1].ctx.data.buf.in, &tmp, 1); in anfc_status_type_exec() 836 instr = &op->instrs[op_id]; in anfc_check_op() 869 op->instrs[0].type == NAND_OP_CMD_INSTR && in anfc_check_op() 870 op->instrs[0].ctx.cmd.opcode != NAND_CMD_STATUS && in anfc_check_op() 871 op->instrs[1].type == NAND_OP_DATA_IN_INSTR) in anfc_check_op()
|
D | ams-delta.c | 151 for (instr = op->instrs; instr < op->instrs + op->ninstrs; instr++) { in gpio_nand_exec_op()
|
D | cadence-nand-controller.c | 2008 instr = &subop->instrs[op_id]; in cadence_nand_cmd_opcode() 2042 instr = &subop->instrs[op_id]; in cadence_nand_cmd_address() 2076 if (subop->instrs[0].ctx.cmd.opcode == NAND_CMD_ERASE1) { in cadence_nand_cmd_erase() 2083 instr = &subop->instrs[1]; in cadence_nand_cmd_erase() 2102 .instrs = &subop->instrs[op_id], in cadence_nand_cmd_erase() 2123 instr = &subop->instrs[op_id]; in cadence_nand_cmd_data() 2189 const struct nand_op_instr *instr = &subop->instrs[op_id]; in cadence_nand_cmd_waitrdy()
|
D | diskonchip.c | 348 struct nand_op_instr instrs[] = { in doc200x_readid() local 354 struct nand_operation op = NAND_OPERATION(cs, instrs); in doc200x_readid() 583 doc200x_exec_instr(this, &op->instrs[i]); in doc200x_exec_op() 655 doc2001plus_exec_instr(this, &op->instrs[i]); in doc2001plus_exec_op()
|
D | au1550nd.c | 226 ret = au1550nd_exec_instr(this, &op->instrs[i]); in au1550nd_exec_op()
|
D | cs553x_nand.c | 212 ret = cs553x_exec_instr(cs553x, &op->instrs[i]); in cs553x_exec_op()
|
D | mxic_nand.c | 402 instr = &op->instrs[op_id]; in mxic_nfc_exec_op()
|
D | tango_nand.c | 184 ret = tango_exec_instr(chip, &op->instrs[i]); in tango_exec_op()
|
D | davinci_nand.c | 763 ret = davinci_nand_exec_instr(info, &op->instrs[i]); in davinci_nand_exec_op()
|
D | marvell_nand.c | 1713 instr = &subop->instrs[op_id]; in marvell_nfc_parse_instructions() 1895 switch (subop->instrs[0].type) { in marvell_nfc_naked_access_exec() 1942 if (subop->instrs[0].type == NAND_OP_DATA_OUT_INSTR) { in marvell_nfc_naked_access_exec()
|
D | vf610_nfc.c | 354 return &subop->instrs[*op_id]; in vf610_get_next_instr()
|
D | sunxi_nand.c | 1784 const struct nand_op_instr *instr = &subop->instrs[i]; in sunxi_nfc_exec_subop() 1874 subop->instrs[0].ctx.waitrdy.timeout_ms); in sunxi_nfc_soft_waitrdy()
|
D | fsmc_nand.c | 634 instr = &op->instrs[op_id]; in fsmc_exec_op()
|
D | tegra_nand.c | 363 instr = &subop->instrs[op_id]; in tegra_nand_cmd()
|
D | denali.c | 1165 ret = denali_exec_instr(chip, &op->instrs[i]); in denali_exec_op()
|
D | meson_nand.c | 917 instr = &op->instrs[op_id]; in meson_nfc_exec_op()
|
/drivers/mtd/nand/raw/ingenic/ |
D | ingenic_nand_drv.c | 324 ret = ingenic_nand_exec_instr(chip, cs, &op->instrs[i]); in ingenic_nand_exec_op() 328 if (op->instrs[i].delay_ns) in ingenic_nand_exec_op() 329 ndelay(op->instrs[i].delay_ns); in ingenic_nand_exec_op()
|
/drivers/mtd/nand/raw/atmel/ |
D | nand-controller.c | 623 ret = atmel_smc_nand_exec_instr(nand, &op->instrs[i]); in atmel_smc_nand_exec_op() 643 const struct nand_op_instr *instr = &subop->instrs[i]; in atmel_hsmc_exec_cmd_addr() 663 const struct nand_op_instr *instr = subop->instrs; in atmel_hsmc_exec_rw() 681 const struct nand_op_instr *instr = subop->instrs; in atmel_hsmc_exec_waitrdy()
|
/drivers/mtd/nand/raw/gpmi-nand/ |
D | gpmi-nand.c | 2305 instr = &op->instrs[i]; in gpmi_nfc_exec_op() 2321 op->instrs[i + 1].type == NAND_OP_ADDR_INSTR) in gpmi_nfc_exec_op()
|