Searched refs:odf (Results 1 – 5 of 5) sorted by relevance
/drivers/clk/st/ |
D | clkgen-pll.c | 52 struct clkgen_field odf[C32_MAX_ODFS]; member 72 .odf = { CLKGEN_FIELD(0x2b4, C32_ODF_MASK, 0) }, 85 .odf = { CLKGEN_FIELD(0x2dc, C32_ODF_MASK, 0) }, 98 .odf = { CLKGEN_FIELD(0x1b0, C32_ODF_MASK, 8) }, 115 .odf = { CLKGEN_FIELD(0x1b0, C28_ODF_MASK, 8) }, 150 u32 odf; member 160 unsigned long odf; member 640 unsigned long pll_flags, int odf, in clkgen_odf_register() argument 656 gate->reg = reg + pll_data->odf_gate[odf].offset; in clkgen_odf_register() 657 gate->bit_idx = pll_data->odf_gate[odf].shift; in clkgen_odf_register() [all …]
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/drivers/gpu/drm/sti/ |
D | sti_hdmi_tx3g4c28phy.c | 48 uint32_t odf; member 79 u32 val, tmdsck, idf, odf, pllctrl = 0; in sti_hdmi_tx3g4c28phy_start() local 89 odf = plldividers[i].odf; in sti_hdmi_tx3g4c28phy_start() 111 pllctrl |= odf << PLL_CFG_ODF_SHIFT; in sti_hdmi_tx3g4c28phy_start()
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/drivers/gpu/drm/stm/ |
D | dw_mipi_dsi-stm.c | 130 static int dsi_pll_get_clkout_khz(int clkin_khz, int idf, int ndiv, int odf) in dsi_pll_get_clkout_khz() argument 132 int divisor = idf * odf; in dsi_pll_get_clkout_khz() 143 int *idf, int *ndiv, int *odf) in dsi_pll_get_params() argument 185 *odf = o; in dsi_pll_get_params() 246 unsigned int idf, ndiv, odf, pll_in_khz, pll_out_khz; in dw_mipi_dsi_get_lane_mbps() local 280 odf = 0; in dw_mipi_dsi_get_lane_mbps() 282 &idf, &ndiv, &odf); in dw_mipi_dsi_get_lane_mbps() 287 pll_out_khz = dsi_pll_get_clkout_khz(pll_in_khz, idf, ndiv, odf); in dw_mipi_dsi_get_lane_mbps() 291 (ndiv << 2) | (idf << 11) | ((ffs(odf) - 1) << 16)); in dw_mipi_dsi_get_lane_mbps()
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/drivers/clk/ |
D | clk-stm32h7.c | 1307 int odf; in stm32h7_rcc_init() local 1316 for (odf = 0; odf < 3; odf++) { in stm32h7_rcc_init() 1317 int idx = n * 3 + odf; in stm32h7_rcc_init() 1319 get_cfg_composite_div(&odf_clk_gcfg, &stm32_odf[n][odf], in stm32h7_rcc_init() 1323 stm32_odf[n][odf].name, in stm32h7_rcc_init() 1324 stm32_odf[n][odf].parent_name, in stm32h7_rcc_init() 1325 stm32_odf[n][odf].num_parents, in stm32h7_rcc_init() 1329 stm32_odf[n][odf].flags); in stm32h7_rcc_init()
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/drivers/media/dvb-frontends/ |
D | stv0910.c | 804 u32 odf = 4; in set_mclock() local 807 u32 ndiv = (fphi * odf * idf) / quartz; in set_mclock() 855 write_reg(state, RSTV0910_NCOARSE2, odf); in set_mclock() 859 state->base->mclk = fvco / (2 * odf) * 1000000; in set_mclock()
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