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Searched refs:ss_divider_index (Results 1 – 10 of 10) sorted by relevance

/drivers/gpu/drm/radeon/
Dsumo_dpm.c563 if (pl->ss_divider_index == 0 || pl->ds_divider_index == 0) { in sumo_program_power_level()
567 sumo_set_ss_dividers(rdev, index, pl->ss_divider_index); in sumo_program_power_level()
1065 ps->levels[0].ss_divider_index = in sumo_patch_thermal_state()
1071 if (ps->levels[0].ds_divider_index > ps->levels[0].ss_divider_index + 1) in sumo_patch_thermal_state()
1072 ps->levels[0].ds_divider_index = ps->levels[0].ss_divider_index + 1; in sumo_patch_thermal_state()
1074 if (ps->levels[0].ss_divider_index == ps->levels[0].ds_divider_index) { in sumo_patch_thermal_state()
1075 if (ps->levels[0].ss_divider_index > 1) in sumo_patch_thermal_state()
1076 ps->levels[0].ss_divider_index = ps->levels[0].ss_divider_index - 1; in sumo_patch_thermal_state()
1079 if (ps->levels[0].ss_divider_index == 0) in sumo_patch_thermal_state()
1083 ps->levels[0].ss_divider_index = 0; in sumo_patch_thermal_state()
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Dtrinity_dpm.h34 u8 ss_divider_index; member
Dkv_dpm.h74 u8 ss_divider_index; member
Dsumo_dpm.h36 u32 ss_divider_index; member
Dtrinity_dpm.c724 trinity_set_ss_dividers(rdev, index, pl->ss_divider_index); in trinity_program_power_level()
1348 pi->boot_pl.ss_divider_index = 0; in trinity_construct_boot_state()
1423 ps->levels[0].ss_divider_index = ps->levels[0].ds_divider_index; in trinity_patch_thermal_state()
1584 ps->levels[i].ss_divider_index = ps->levels[i].ds_divider_index; in trinity_apply_state_adjust_rules()
1725 pl->ss_divider_index = 5; in trinity_parse_pplib_clock_info()
Dkv_dpm.c2033 pi->boot_pl.ss_divider_index = 0; in kv_construct_boot_state()
2628 pl->ss_divider_index = 5; in kv_parse_pplib_clock_info()
/drivers/gpu/drm/amd/pm/powerplay/
Dkv_dpm.h100 u8 ss_divider_index; member
Dkv_dpm.c2088 pi->boot_pl.ss_divider_index = 0; in kv_construct_boot_state()
2685 pl->ss_divider_index = 5; in kv_parse_pplib_clock_info()
/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dsmu10_hwmgr.h79 uint8_t ss_divider_index; member
Dsmu10_hwmgr.c820 smu10_ps->levels[index].ss_divider_index = 5; in smu10_dpm_get_pp_table_entry_callback()
1041 clock_info->min_eng_clk = ps->levels[0].engine_clock / (1 << (ps->levels[0].ss_divider_index)); in smu10_get_current_shallow_sleep_clocks()
1042 …clk = ps->levels[ps->level - 1].engine_clock / (1 << (ps->levels[ps->level - 1].ss_divider_index)); in smu10_get_current_shallow_sleep_clocks()