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Searched refs:t9 (Results 1 – 5 of 5) sorted by relevance

/drivers/gpu/drm/i915/display/
Dintel_bios.h52 u16 t9; member
Dintel_dp.c6961 seq->t9 = REG_FIELD_GET(PANEL_LIGHT_OFF_DELAY_MASK, pp_off); in intel_pps_readout_hw_state()
6980 seq->t1_t3, seq->t8, seq->t9, seq->t10, seq->t11_t12); in intel_pps_dump_state()
6991 if (hw.t1_t3 != sw->t1_t3 || hw.t8 != sw->t8 || hw.t9 != sw->t9 || in intel_pps_verify_state()
7038 spec.t9 = 50 * 10; /* no limit for t9, make it symmetric with t8 */ in intel_dp_init_panel_power_sequencer()
7055 assign_final(t9); in intel_dp_init_panel_power_sequencer()
7063 intel_dp->backlight_off_delay = get_delay(t9); in intel_dp_init_panel_power_sequencer()
7086 final->t9 = 1; in intel_dp_init_panel_power_sequencer()
7139 pp_off = REG_FIELD_PREP(PANEL_LIGHT_OFF_DELAY_MASK, seq->t9) | in intel_dp_init_panel_power_sequencer_registers()
/drivers/gpu/drm/gma500/
Dintel_bios.h447 u16 t9; member
Dcdv_intel_dp.c2049 cur.t9 = (pp_off & PANEL_LIGHT_OFF_DELAY_MASK) >> in cdv_intel_dp_init()
2059 cur.t1_t3, cur.t8, cur.t9, cur.t10, cur.t11_t12); in cdv_intel_dp_init()
2064 intel_dp->backlight_off_delay = cur.t9 / 10; in cdv_intel_dp_init()
Dintel_bios.c84 dev_priv->edp.pps.t9, dev_priv->edp.pps.t10, in parse_edp()