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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
4 * Copyright (C) 2018 Robert Bosch Power Tools GmbH
5 */
6/dts-v1/;
7
8#include "am33xx.dtsi"
9#include <dt-bindings/input/input.h>
10#include <dt-bindings/interrupt-controller/irq.h>
11
12/ {
13	model = "Bosch AM335x Guardian";
14	compatible = "bosch,am335x-guardian", "ti,am33xx";
15
16	chosen {
17		stdout-path = &uart0;
18		tick-timer = &timer2;
19	};
20
21	cpus {
22		cpu@0 {
23			cpu0-supply = <&dcdc2_reg>;
24		};
25	};
26
27	memory@80000000 {
28		device_type = "memory";
29		reg = <0x80000000 0x10000000>; /* 256 MB */
30	};
31
32	gpio_keys {
33		compatible = "gpio-keys";
34		#address-cells = <1>;
35		#size-cells = <0>;
36		pinctrl-names = "default";
37		pinctrl-0 = <&gpio_keys_pins>;
38
39		button21 {
40			label = "guardian-power-button";
41			linux,code = <KEY_POWER>;
42			gpios = <&gpio2 21 0>;
43			wakeup-source;
44		};
45	};
46
47	leds {
48		compatible = "gpio-leds";
49		pinctrl-names = "default";
50		pinctrl-0 = <&leds_pins>;
51
52		led1 {
53			label = "green:heartbeat";
54			gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>;
55			linux,default-trigger = "heartbeat";
56			default-state = "off";
57		};
58
59		led2 {
60			label = "green:mmc0";
61			gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
62			linux,default-trigger = "mmc0";
63			default-state = "off";
64		};
65	};
66
67	panel {
68		compatible = "ti,tilcdc,panel";
69		pinctrl-names = "default", "sleep";
70		pinctrl-0 = <&lcd_pins_default &lcd_disen_pins>;
71		pinctrl-1 = <&lcd_pins_sleep>;
72
73		display-timings {
74			320x240 {
75				hactive         = <320>;
76				vactive         = <240>;
77				hback-porch     = <68>;
78				hfront-porch    = <20>;
79				hsync-len       = <1>;
80				vback-porch     = <18>;
81				vfront-porch    = <4>;
82				vsync-len       = <1>;
83				clock-frequency = <9000000>;
84				hsync-active    = <0>;
85				vsync-active    = <0>;
86			};
87		};
88		panel-info {
89			ac-bias           = <255>;
90			ac-bias-intrpt    = <0>;
91			dma-burst-sz      = <16>;
92			bpp               = <24>;
93			bus-width         = <16>;
94			fdd               = <0x80>;
95			sync-edge         = <0>;
96			sync-ctrl         = <1>;
97			raster-order      = <0>;
98			fifo-th           = <0>;
99		};
100
101	};
102
103	guardian_beeper: pwm-7 {
104		compatible = "ti,omap-dmtimer-pwm";
105		#pwm-cells = <3>;
106		ti,timers = <&timer7>;
107		pinctrl-names = "default";
108		pinctrl-0 = <&guardian_beeper_pins>;
109		ti,clock-source = <0x01>;
110	};
111
112	vmmcsd_fixed: regulator-3v3 {
113		compatible = "regulator-fixed";
114		regulator-name = "vmmcsd_fixed";
115		regulator-min-microvolt = <3300000>;
116		regulator-max-microvolt = <3300000>;
117	};
118};
119
120&elm {
121	status = "okay";
122};
123
124&gpmc {
125	pinctrl-names = "default";
126	pinctrl-0 = <&nandflash_pins>;
127	ranges = <0 0 0x08000000 0x1000000>;  /* CS0: 16MB for NAND */
128	status = "okay";
129
130	nand@0,0 {
131		compatible = "ti,omap2-nand";
132		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
133		interrupt-parent = <&gpmc>;
134		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
135			     <1 IRQ_TYPE_NONE>; /* termcount */
136		rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
137		ti,nand-ecc-opt = "bch16";
138		ti,elm-id = <&elm>;
139		nand-bus-width = <8>;
140		gpmc,device-width = <1>;
141		gpmc,sync-clk-ps = <0>;
142		gpmc,cs-on-ns = <0>;
143		gpmc,cs-rd-off-ns = <44>;
144		gpmc,cs-wr-off-ns = <44>;
145		gpmc,adv-on-ns = <6>;
146		gpmc,adv-rd-off-ns = <34>;
147		gpmc,adv-wr-off-ns = <44>;
148		gpmc,we-on-ns = <0>;
149		gpmc,we-off-ns = <40>;
150		gpmc,oe-on-ns = <0>;
151		gpmc,oe-off-ns = <54>;
152		gpmc,access-ns = <64>;
153		gpmc,rd-cycle-ns = <82>;
154		gpmc,wr-cycle-ns = <82>;
155		gpmc,bus-turnaround-ns = <0>;
156		gpmc,cycle2cycle-delay-ns = <0>;
157		gpmc,clk-activation-ns = <0>;
158		gpmc,wr-access-ns = <40>;
159		gpmc,wr-data-mux-bus-ns = <0>;
160
161		/*
162		 * MTD partition table
163		 *
164		 * All SPL-* partitions are sized to minimal length which can
165		 * be independently programmable. For NAND flash this is equal
166		 * to size of erase-block.
167		 */
168		#address-cells = <1>;
169		#size-cells = <1>;
170
171		partition@0 {
172			label = "SPL";
173			reg = <0x0 0x40000>;
174		};
175
176		partition@1 {
177			label = "SPL.backup1";
178			reg = <0x40000  0x40000>;
179		};
180
181		partition@2 {
182			label = "SPL.backup2";
183			reg = <0x80000  0x40000>;
184		};
185
186		partition@3 {
187			label = "SPL.backup3";
188			reg = <0xc0000  0x40000>;
189		};
190
191		partition@4 {
192			label = "u-boot";
193			reg = <0x100000 0x100000>;
194		};
195
196		partition@5 {
197			label = "u-boot.backup1";
198			reg = <0x200000 0x100000>;
199		};
200
201		partition@6 {
202			label = "u-boot-env";
203			reg = <0x300000 0x40000>;
204		};
205
206		partition@7 {
207			label = "u-boot-env.backup1";
208			reg = <0x340000 0x40000>;
209		};
210
211		partition@8 {
212			label = "UBI";
213			reg = <0x380000 0x1fc80000>;
214		};
215	};
216};
217
218&i2c0 {
219	pinctrl-names = "default";
220	pinctrl-0 = <&i2c0_pins>;
221	clock-frequency = <400000>;
222	status = "okay";
223
224	tps: tps@24 {
225		reg = <0x24>;
226	};
227};
228
229&lcdc {
230	blue-and-red-wiring = "crossed";
231	status = "okay";
232};
233
234&mmc1 {
235	bus-width = <0x4>;
236	pinctrl-names = "default";
237	pinctrl-0 = <&mmc1_pins>;
238	cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
239	vmmc-supply = <&vmmcsd_fixed>;
240	status = "okay";
241};
242
243&rtc {
244	clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
245	clock-names = "ext-clk", "int-clk";
246	system-power-controller;
247};
248
249&spi0 {
250	ti,pindir-d0-out-d1-in;
251	pinctrl-names = "default";
252	pinctrl-0 = <&spi0_pins>;
253	status = "okay";
254};
255
256#include "tps65217.dtsi"
257
258&tps {
259	ti,pmic-shutdown-controller;
260	interrupt-parent = <&intc>;
261	interrupts = <7>; /* NMI */
262
263	backlight {
264		isel = <1>;  /* 1 - ISET1, 2 ISET2 */
265		fdim = <100>; /* TPS65217_BL_FDIM_100HZ */
266		default-brightness = <100>;
267	};
268
269	regulators {
270		dcdc1_reg: regulator@0 {
271			regulator-name = "vdds_dpr";
272			regulator-always-on;
273		};
274
275		dcdc2_reg: regulator@1 {
276			regulator-name = "vdd_mpu";
277			regulator-min-microvolt = <925000>;
278			regulator-max-microvolt = <1351500>;
279			regulator-boot-on;
280			regulator-always-on;
281		};
282
283		dcdc3_reg: regulator@2 {
284			regulator-name = "vdd_core";
285			regulator-min-microvolt = <925000>;
286			regulator-max-microvolt = <1150000>;
287			regulator-boot-on;
288			regulator-always-on;
289		};
290
291		ldo1_reg: regulator@3 {
292			regulator-name = "vio,vrtc,vdds";
293			regulator-always-on;
294		};
295
296		ldo2_reg: regulator@4 {
297			regulator-name = "vdd_3v3aux";
298			regulator-always-on;
299		};
300
301		ldo3_reg: regulator@5 {
302			regulator-name = "vdd_1v8";
303			regulator-min-microvolt = <1800000>;
304			regulator-max-microvolt = <1800000>;
305			regulator-always-on;
306		};
307
308		ldo4_reg: regulator@6 {
309			regulator-name = "vdd_3v3a";
310			regulator-always-on;
311		};
312	};
313};
314
315&tscadc {
316	status = "okay";
317
318	adc {
319		ti,adc-channels = <0 1 2 3 4 5 6>;
320	};
321};
322
323&uart0 {
324	pinctrl-names = "default";
325	pinctrl-0 = <&uart0_pins>;
326	status = "okay";
327};
328
329&usb0 {
330	dr_mode = "peripheral";
331};
332
333&usb1 {
334	dr_mode = "host";
335};
336
337&am33xx_pinmux {
338	pinctrl-names = "default";
339	pinctrl-0 = <&clkout2_pin &gpio_pins>;
340
341	clkout2_pin: pinmux_clkout2_pin {
342		pinctrl-single,pins = <
343			AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3)
344		>;
345	};
346
347	guardian_beeper_pins: pinmux_dmtimer7_pins {
348		pinctrl-single,pins = <
349			AM33XX_IOPAD(0x968, PIN_OUTPUT | MUX_MODE5) /* (E18) timer7 */
350		>;
351	};
352
353	gpio_keys_pins: pinmux_gpio_keys_pins {
354		pinctrl-single,pins = <
355			AM33XX_IOPAD(0x940, PIN_INPUT | MUX_MODE7)
356		>;
357	};
358
359	gpio_pins: pinmux_gpio_pins {
360		pinctrl-single,pins = <
361			AM33XX_IOPAD(0x928, PIN_OUTPUT | MUX_MODE7)
362			AM33XX_IOPAD(0x990, PIN_OUTPUT | MUX_MODE7)
363		>;
364	};
365
366	i2c0_pins: pinmux_i2c0_pins {
367		pinctrl-single,pins = <
368			AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0)
369			AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0)
370		>;
371	};
372
373	lcd_disen_pins: pinmux_lcd_disen_pins {
374		pinctrl-single,pins = <
375			AM33XX_IOPAD(0x9a4, PIN_OUTPUT_PULLUP | SLEWCTRL_SLOW | MUX_MODE7)
376		>;
377	};
378
379	lcd_pins_default: pinmux_lcd_pins_default {
380		pinctrl-single,pins = <
381			AM33XX_IOPAD(0x820, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
382			AM33XX_IOPAD(0x824, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
383			AM33XX_IOPAD(0x828, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
384			AM33XX_IOPAD(0x82c, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
385			AM33XX_IOPAD(0x830, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
386			AM33XX_IOPAD(0x834, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
387			AM33XX_IOPAD(0x838, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
388			AM33XX_IOPAD(0x83c, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
389			AM33XX_IOPAD(0x8a0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
390			AM33XX_IOPAD(0x8a4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
391			AM33XX_IOPAD(0x8a8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
392			AM33XX_IOPAD(0x8ac, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
393			AM33XX_IOPAD(0x8b0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
394			AM33XX_IOPAD(0x8b4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
395			AM33XX_IOPAD(0x8b8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
396			AM33XX_IOPAD(0x8bc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
397			AM33XX_IOPAD(0x8c0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
398			AM33XX_IOPAD(0x8c4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
399			AM33XX_IOPAD(0x8c8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
400			AM33XX_IOPAD(0x8cc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
401			AM33XX_IOPAD(0x8d0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
402			AM33XX_IOPAD(0x8d4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
403			AM33XX_IOPAD(0x8d8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
404			AM33XX_IOPAD(0x8dc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
405			AM33XX_IOPAD(0x8e0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
406			AM33XX_IOPAD(0x8e4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
407			AM33XX_IOPAD(0x8e8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
408			AM33XX_IOPAD(0x8ec, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
409		>;
410	};
411
412	lcd_pins_sleep: pinmux_lcd_pins_sleep {
413		pinctrl-single,pins = <
414			AM33XX_IOPAD(0x8a0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
415			AM33XX_IOPAD(0x8a4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
416			AM33XX_IOPAD(0x8a8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
417			AM33XX_IOPAD(0x8ac, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
418			AM33XX_IOPAD(0x8b0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
419			AM33XX_IOPAD(0x8b4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
420			AM33XX_IOPAD(0x8b8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
421			AM33XX_IOPAD(0x8bc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
422			AM33XX_IOPAD(0x8c0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
423			AM33XX_IOPAD(0x8c4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
424			AM33XX_IOPAD(0x8c8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
425			AM33XX_IOPAD(0x8cc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
426			AM33XX_IOPAD(0x8d0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
427			AM33XX_IOPAD(0x8d4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
428			AM33XX_IOPAD(0x8d8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
429			AM33XX_IOPAD(0x8dc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
430			AM33XX_IOPAD(0x8e0, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
431			AM33XX_IOPAD(0x8e4, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
432			AM33XX_IOPAD(0x8e8, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
433			AM33XX_IOPAD(0x8ec, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
434		>;
435	};
436
437	leds_pins: pinmux_leds_pins {
438		pinctrl-single,pins = <
439			AM33XX_IOPAD(0x868, PIN_OUTPUT | MUX_MODE7)
440			AM33XX_IOPAD(0x86c, PIN_OUTPUT | MUX_MODE7)
441		>;
442	};
443
444	mmc1_pins: pinmux_mmc1_pins {
445		pinctrl-single,pins = <
446			AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0)
447			AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0)
448			AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0)
449			AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0)
450			AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0)
451			AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0)
452			AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7)
453		>;
454	};
455
456	spi0_pins: pinmux_spi0_pins {
457		pinctrl-single,pins = <
458			AM33XX_IOPAD(0x950, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
459			AM33XX_IOPAD(0x954, PIN_OUTPUT_PULLUP | MUX_MODE0)
460			AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0)
461			AM33XX_IOPAD(0x95c, PIN_OUTPUT_PULLUP | MUX_MODE0)
462		>;
463	};
464
465	uart0_pins: pinmux_uart0_pins {
466		pinctrl-single,pins = <
467			AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)
468			AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
469		>;
470	};
471
472	nandflash_pins: pinmux_nandflash_pins {
473		pinctrl-single,pins = <
474			AM33XX_IOPAD(0x800, PIN_INPUT | MUX_MODE0)
475			AM33XX_IOPAD(0x804, PIN_INPUT | MUX_MODE0)
476			AM33XX_IOPAD(0x808, PIN_INPUT | MUX_MODE0)
477			AM33XX_IOPAD(0x80c, PIN_INPUT | MUX_MODE0)
478			AM33XX_IOPAD(0x810, PIN_INPUT | MUX_MODE0)
479			AM33XX_IOPAD(0x814, PIN_INPUT | MUX_MODE0)
480			AM33XX_IOPAD(0x818, PIN_INPUT | MUX_MODE0)
481			AM33XX_IOPAD(0x81c, PIN_INPUT | MUX_MODE0)
482			AM33XX_IOPAD(0x870, PIN_INPUT | MUX_MODE0)
483			AM33XX_IOPAD(0x874, PIN_OUTPUT | MUX_MODE0)
484			AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0)
485			AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0)
486			AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0)
487			AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)
488			AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)
489		>;
490	};
491};
492