1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * 4 * Copyright (C) 1991, 1992 Linus Torvalds 5 * 6 * Enhanced CPU detection and feature setting code by Mike Jagdis 7 * and Martin Mares, November 1997. 8 */ 9 10.text 11#include <linux/threads.h> 12#include <linux/init.h> 13#include <linux/linkage.h> 14#include <asm/segment.h> 15#include <asm/page_types.h> 16#include <asm/pgtable_types.h> 17#include <asm/cache.h> 18#include <asm/thread_info.h> 19#include <asm/asm-offsets.h> 20#include <asm/setup.h> 21#include <asm/processor-flags.h> 22#include <asm/msr-index.h> 23#include <asm/cpufeatures.h> 24#include <asm/percpu.h> 25#include <asm/nops.h> 26#include <asm/nospec-branch.h> 27#include <asm/bootparam.h> 28#include <asm/export.h> 29#include <asm/pgtable_32.h> 30 31/* Physical address */ 32#define pa(X) ((X) - __PAGE_OFFSET) 33 34/* 35 * References to members of the new_cpu_data structure. 36 */ 37 38#define X86 new_cpu_data+CPUINFO_x86 39#define X86_VENDOR new_cpu_data+CPUINFO_x86_vendor 40#define X86_MODEL new_cpu_data+CPUINFO_x86_model 41#define X86_STEPPING new_cpu_data+CPUINFO_x86_stepping 42#define X86_HARD_MATH new_cpu_data+CPUINFO_hard_math 43#define X86_CPUID new_cpu_data+CPUINFO_cpuid_level 44#define X86_CAPABILITY new_cpu_data+CPUINFO_x86_capability 45#define X86_VENDOR_ID new_cpu_data+CPUINFO_x86_vendor_id 46 47 48#define SIZEOF_PTREGS 17*4 49 50/* 51 * Worst-case size of the kernel mapping we need to make: 52 * a relocatable kernel can live anywhere in lowmem, so we need to be able 53 * to map all of lowmem. 54 */ 55KERNEL_PAGES = LOWMEM_PAGES 56 57INIT_MAP_SIZE = PAGE_TABLE_SIZE(KERNEL_PAGES) * PAGE_SIZE 58RESERVE_BRK(pagetables, INIT_MAP_SIZE) 59 60/* 61 * 32-bit kernel entrypoint; only used by the boot CPU. On entry, 62 * %esi points to the real-mode code as a 32-bit pointer. 63 * CS and DS must be 4 GB flat segments, but we don't depend on 64 * any particular GDT layout, because we load our own as soon as we 65 * can. 66 */ 67__HEAD 68SYM_CODE_START(startup_32) 69 movl pa(initial_stack),%ecx 70 71/* 72 * Set segments to known values. 73 */ 74 lgdt pa(boot_gdt_descr) 75 movl $(__BOOT_DS),%eax 76 movl %eax,%ds 77 movl %eax,%es 78 movl %eax,%fs 79 movl %eax,%gs 80 movl %eax,%ss 81 leal -__PAGE_OFFSET(%ecx),%esp 82 83/* 84 * Clear BSS first so that there are no surprises... 85 */ 86 cld 87 xorl %eax,%eax 88 movl $pa(__bss_start),%edi 89 movl $pa(__bss_stop),%ecx 90 subl %edi,%ecx 91 shrl $2,%ecx 92 rep ; stosl 93/* 94 * Copy bootup parameters out of the way. 95 * Note: %esi still has the pointer to the real-mode data. 96 * With the kexec as boot loader, parameter segment might be loaded beyond 97 * kernel image and might not even be addressable by early boot page tables. 98 * (kexec on panic case). Hence copy out the parameters before initializing 99 * page tables. 100 */ 101 movl $pa(boot_params),%edi 102 movl $(PARAM_SIZE/4),%ecx 103 cld 104 rep 105 movsl 106 movl pa(boot_params) + NEW_CL_POINTER,%esi 107 andl %esi,%esi 108 jz 1f # No command line 109 movl $pa(boot_command_line),%edi 110 movl $(COMMAND_LINE_SIZE/4),%ecx 111 rep 112 movsl 1131: 114 115#ifdef CONFIG_OLPC 116 /* save OFW's pgdir table for later use when calling into OFW */ 117 movl %cr3, %eax 118 movl %eax, pa(olpc_ofw_pgd) 119#endif 120 121#ifdef CONFIG_MICROCODE 122 /* Early load ucode on BSP. */ 123 call load_ucode_bsp 124#endif 125 126 /* Create early pagetables. */ 127 call mk_early_pgtbl_32 128 129 /* Do early initialization of the fixmap area */ 130 movl $pa(initial_pg_fixmap)+PDE_IDENT_ATTR,%eax 131#ifdef CONFIG_X86_PAE 132#define KPMDS (((-__PAGE_OFFSET) >> 30) & 3) /* Number of kernel PMDs */ 133 movl %eax,pa(initial_pg_pmd+0x1000*KPMDS-8) 134#else 135 movl %eax,pa(initial_page_table+0xffc) 136#endif 137 138 jmp .Ldefault_entry 139SYM_CODE_END(startup_32) 140 141#ifdef CONFIG_HOTPLUG_CPU 142/* 143 * Boot CPU0 entry point. It's called from play_dead(). Everything has been set 144 * up already except stack. We just set up stack here. Then call 145 * start_secondary(). 146 */ 147SYM_FUNC_START(start_cpu0) 148 movl initial_stack, %ecx 149 movl %ecx, %esp 150 call *(initial_code) 1511: jmp 1b 152SYM_FUNC_END(start_cpu0) 153#endif 154 155/* 156 * Non-boot CPU entry point; entered from trampoline.S 157 * We can't lgdt here, because lgdt itself uses a data segment, but 158 * we know the trampoline has already loaded the boot_gdt for us. 159 * 160 * If cpu hotplug is not supported then this code can go in init section 161 * which will be freed later 162 */ 163SYM_FUNC_START(startup_32_smp) 164 cld 165 movl $(__BOOT_DS),%eax 166 movl %eax,%ds 167 movl %eax,%es 168 movl %eax,%fs 169 movl %eax,%gs 170 movl pa(initial_stack),%ecx 171 movl %eax,%ss 172 leal -__PAGE_OFFSET(%ecx),%esp 173 174#ifdef CONFIG_MICROCODE 175 /* Early load ucode on AP. */ 176 call load_ucode_ap 177#endif 178 179.Ldefault_entry: 180 movl $(CR0_STATE & ~X86_CR0_PG),%eax 181 movl %eax,%cr0 182 183/* 184 * We want to start out with EFLAGS unambiguously cleared. Some BIOSes leave 185 * bits like NT set. This would confuse the debugger if this code is traced. So 186 * initialize them properly now before switching to protected mode. That means 187 * DF in particular (even though we have cleared it earlier after copying the 188 * command line) because GCC expects it. 189 */ 190 pushl $0 191 popfl 192 193/* 194 * New page tables may be in 4Mbyte page mode and may be using the global pages. 195 * 196 * NOTE! If we are on a 486 we may have no cr4 at all! Specifically, cr4 exists 197 * if and only if CPUID exists and has flags other than the FPU flag set. 198 */ 199 movl $-1,pa(X86_CPUID) # preset CPUID level 200 movl $X86_EFLAGS_ID,%ecx 201 pushl %ecx 202 popfl # set EFLAGS=ID 203 pushfl 204 popl %eax # get EFLAGS 205 testl $X86_EFLAGS_ID,%eax # did EFLAGS.ID remained set? 206 jz .Lenable_paging # hw disallowed setting of ID bit 207 # which means no CPUID and no CR4 208 209 xorl %eax,%eax 210 cpuid 211 movl %eax,pa(X86_CPUID) # save largest std CPUID function 212 213 movl $1,%eax 214 cpuid 215 andl $~1,%edx # Ignore CPUID.FPU 216 jz .Lenable_paging # No flags or only CPUID.FPU = no CR4 217 218 movl pa(mmu_cr4_features),%eax 219 movl %eax,%cr4 220 221 testb $X86_CR4_PAE, %al # check if PAE is enabled 222 jz .Lenable_paging 223 224 /* Check if extended functions are implemented */ 225 movl $0x80000000, %eax 226 cpuid 227 /* Value must be in the range 0x80000001 to 0x8000ffff */ 228 subl $0x80000001, %eax 229 cmpl $(0x8000ffff-0x80000001), %eax 230 ja .Lenable_paging 231 232 /* Clear bogus XD_DISABLE bits */ 233 call verify_cpu 234 235 mov $0x80000001, %eax 236 cpuid 237 /* Execute Disable bit supported? */ 238 btl $(X86_FEATURE_NX & 31), %edx 239 jnc .Lenable_paging 240 241 /* Setup EFER (Extended Feature Enable Register) */ 242 movl $MSR_EFER, %ecx 243 rdmsr 244 245 btsl $_EFER_NX, %eax 246 /* Make changes effective */ 247 wrmsr 248 249.Lenable_paging: 250 251/* 252 * Enable paging 253 */ 254 movl $pa(initial_page_table), %eax 255 movl %eax,%cr3 /* set the page table pointer.. */ 256 movl $CR0_STATE,%eax 257 movl %eax,%cr0 /* ..and set paging (PG) bit */ 258 ljmp $__BOOT_CS,$1f /* Clear prefetch and normalize %eip */ 2591: 260 /* Shift the stack pointer to a virtual address */ 261 addl $__PAGE_OFFSET, %esp 262 263/* 264 * start system 32-bit setup. We need to re-do some of the things done 265 * in 16-bit mode for the "real" operations. 266 */ 267 movl setup_once_ref,%eax 268 andl %eax,%eax 269 jz 1f # Did we do this already? 270 call *%eax 2711: 272 273/* 274 * Check if it is 486 275 */ 276 movb $4,X86 # at least 486 277 cmpl $-1,X86_CPUID 278 je .Lis486 279 280 /* get vendor info */ 281 xorl %eax,%eax # call CPUID with 0 -> return vendor ID 282 cpuid 283 movl %eax,X86_CPUID # save CPUID level 284 movl %ebx,X86_VENDOR_ID # lo 4 chars 285 movl %edx,X86_VENDOR_ID+4 # next 4 chars 286 movl %ecx,X86_VENDOR_ID+8 # last 4 chars 287 288 orl %eax,%eax # do we have processor info as well? 289 je .Lis486 290 291 movl $1,%eax # Use the CPUID instruction to get CPU type 292 cpuid 293 movb %al,%cl # save reg for future use 294 andb $0x0f,%ah # mask processor family 295 movb %ah,X86 296 andb $0xf0,%al # mask model 297 shrb $4,%al 298 movb %al,X86_MODEL 299 andb $0x0f,%cl # mask mask revision 300 movb %cl,X86_STEPPING 301 movl %edx,X86_CAPABILITY 302 303.Lis486: 304 movl $0x50022,%ecx # set AM, WP, NE and MP 305 movl %cr0,%eax 306 andl $0x80000011,%eax # Save PG,PE,ET 307 orl %ecx,%eax 308 movl %eax,%cr0 309 310 lgdt early_gdt_descr 311 ljmp $(__KERNEL_CS),$1f 3121: movl $(__KERNEL_DS),%eax # reload all the segment registers 313 movl %eax,%ss # after changing gdt. 314 315 movl $(__USER_DS),%eax # DS/ES contains default USER segment 316 movl %eax,%ds 317 movl %eax,%es 318 319 movl $(__KERNEL_PERCPU), %eax 320 movl %eax,%fs # set this cpu's percpu 321 322 movl $(__KERNEL_STACK_CANARY),%eax 323 movl %eax,%gs 324 325 xorl %eax,%eax # Clear LDT 326 lldt %ax 327 328 call *(initial_code) 3291: jmp 1b 330SYM_FUNC_END(startup_32_smp) 331 332#include "verify_cpu.S" 333 334/* 335 * setup_once 336 * 337 * The setup work we only want to run on the BSP. 338 * 339 * Warning: %esi is live across this function. 340 */ 341__INIT 342setup_once: 343#ifdef CONFIG_STACKPROTECTOR 344 /* 345 * Configure the stack canary. The linker can't handle this by 346 * relocation. Manually set base address in stack canary 347 * segment descriptor. 348 */ 349 movl $gdt_page,%eax 350 movl $stack_canary,%ecx 351 movw %cx, 8 * GDT_ENTRY_STACK_CANARY + 2(%eax) 352 shrl $16, %ecx 353 movb %cl, 8 * GDT_ENTRY_STACK_CANARY + 4(%eax) 354 movb %ch, 8 * GDT_ENTRY_STACK_CANARY + 7(%eax) 355#endif 356 357 andl $0,setup_once_ref /* Once is enough, thanks */ 358 RET 359 360SYM_FUNC_START(early_idt_handler_array) 361 # 36(%esp) %eflags 362 # 32(%esp) %cs 363 # 28(%esp) %eip 364 # 24(%rsp) error code 365 i = 0 366 .rept NUM_EXCEPTION_VECTORS 367 .if ((EXCEPTION_ERRCODE_MASK >> i) & 1) == 0 368 pushl $0 # Dummy error code, to make stack frame uniform 369 .endif 370 pushl $i # 20(%esp) Vector number 371 jmp early_idt_handler_common 372 i = i + 1 373 .fill early_idt_handler_array + i*EARLY_IDT_HANDLER_SIZE - ., 1, 0xcc 374 .endr 375SYM_FUNC_END(early_idt_handler_array) 376 377SYM_CODE_START_LOCAL(early_idt_handler_common) 378 /* 379 * The stack is the hardware frame, an error code or zero, and the 380 * vector number. 381 */ 382 cld 383 384 incl %ss:early_recursion_flag 385 386 /* The vector number is in pt_regs->gs */ 387 388 cld 389 pushl %fs /* pt_regs->fs (__fsh varies by model) */ 390 pushl %es /* pt_regs->es (__esh varies by model) */ 391 pushl %ds /* pt_regs->ds (__dsh varies by model) */ 392 pushl %eax /* pt_regs->ax */ 393 pushl %ebp /* pt_regs->bp */ 394 pushl %edi /* pt_regs->di */ 395 pushl %esi /* pt_regs->si */ 396 pushl %edx /* pt_regs->dx */ 397 pushl %ecx /* pt_regs->cx */ 398 pushl %ebx /* pt_regs->bx */ 399 400 /* Fix up DS and ES */ 401 movl $(__KERNEL_DS), %ecx 402 movl %ecx, %ds 403 movl %ecx, %es 404 405 /* Load the vector number into EDX */ 406 movl PT_GS(%esp), %edx 407 408 /* Load GS into pt_regs->gs (and maybe clobber __gsh) */ 409 movw %gs, PT_GS(%esp) 410 411 movl %esp, %eax /* args are pt_regs (EAX), trapnr (EDX) */ 412 call early_fixup_exception 413 414 popl %ebx /* pt_regs->bx */ 415 popl %ecx /* pt_regs->cx */ 416 popl %edx /* pt_regs->dx */ 417 popl %esi /* pt_regs->si */ 418 popl %edi /* pt_regs->di */ 419 popl %ebp /* pt_regs->bp */ 420 popl %eax /* pt_regs->ax */ 421 popl %ds /* pt_regs->ds (always ignores __dsh) */ 422 popl %es /* pt_regs->es (always ignores __esh) */ 423 popl %fs /* pt_regs->fs (always ignores __fsh) */ 424 popl %gs /* pt_regs->gs (always ignores __gsh) */ 425 decl %ss:early_recursion_flag 426 addl $4, %esp /* pop pt_regs->orig_ax */ 427 iret 428SYM_CODE_END(early_idt_handler_common) 429 430/* This is the default interrupt "handler" :-) */ 431SYM_FUNC_START(early_ignore_irq) 432 cld 433#ifdef CONFIG_PRINTK 434 pushl %eax 435 pushl %ecx 436 pushl %edx 437 pushl %es 438 pushl %ds 439 movl $(__KERNEL_DS),%eax 440 movl %eax,%ds 441 movl %eax,%es 442 cmpl $2,early_recursion_flag 443 je hlt_loop 444 incl early_recursion_flag 445 pushl 16(%esp) 446 pushl 24(%esp) 447 pushl 32(%esp) 448 pushl 40(%esp) 449 pushl $int_msg 450 call printk 451 452 call dump_stack 453 454 addl $(5*4),%esp 455 popl %ds 456 popl %es 457 popl %edx 458 popl %ecx 459 popl %eax 460#endif 461 iret 462 463hlt_loop: 464 hlt 465 jmp hlt_loop 466SYM_FUNC_END(early_ignore_irq) 467 468__INITDATA 469 .align 4 470SYM_DATA(early_recursion_flag, .long 0) 471 472__REFDATA 473 .align 4 474SYM_DATA(initial_code, .long i386_start_kernel) 475SYM_DATA(setup_once_ref, .long setup_once) 476 477#ifdef CONFIG_PAGE_TABLE_ISOLATION 478#define PGD_ALIGN (2 * PAGE_SIZE) 479#define PTI_USER_PGD_FILL 1024 480#else 481#define PGD_ALIGN (PAGE_SIZE) 482#define PTI_USER_PGD_FILL 0 483#endif 484/* 485 * BSS section 486 */ 487__PAGE_ALIGNED_BSS 488 .align PGD_ALIGN 489#ifdef CONFIG_X86_PAE 490.globl initial_pg_pmd 491initial_pg_pmd: 492 .fill 1024*KPMDS,4,0 493#else 494.globl initial_page_table 495initial_page_table: 496 .fill 1024,4,0 497#endif 498 .align PGD_ALIGN 499initial_pg_fixmap: 500 .fill 1024,4,0 501.globl swapper_pg_dir 502 .align PGD_ALIGN 503swapper_pg_dir: 504 .fill 1024,4,0 505 .fill PTI_USER_PGD_FILL,4,0 506.globl empty_zero_page 507empty_zero_page: 508 .fill 4096,1,0 509EXPORT_SYMBOL(empty_zero_page) 510 511/* 512 * This starts the data section. 513 */ 514#ifdef CONFIG_X86_PAE 515__PAGE_ALIGNED_DATA 516 /* Page-aligned for the benefit of paravirt? */ 517 .align PGD_ALIGN 518SYM_DATA_START(initial_page_table) 519 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0 /* low identity map */ 520# if KPMDS == 3 521 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0 522 .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x1000),0 523 .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x2000),0 524# elif KPMDS == 2 525 .long 0,0 526 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0 527 .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x1000),0 528# elif KPMDS == 1 529 .long 0,0 530 .long 0,0 531 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0 532# else 533# error "Kernel PMDs should be 1, 2 or 3" 534# endif 535 .align PAGE_SIZE /* needs to be page-sized too */ 536 537#ifdef CONFIG_PAGE_TABLE_ISOLATION 538 /* 539 * PTI needs another page so sync_initial_pagetable() works correctly 540 * and does not scribble over the data which is placed behind the 541 * actual initial_page_table. See clone_pgd_range(). 542 */ 543 .fill 1024, 4, 0 544#endif 545 546SYM_DATA_END(initial_page_table) 547#endif 548 549.data 550.balign 4 551/* 552 * The SIZEOF_PTREGS gap is a convention which helps the in-kernel unwinder 553 * reliably detect the end of the stack. 554 */ 555SYM_DATA(initial_stack, 556 .long init_thread_union + THREAD_SIZE - 557 SIZEOF_PTREGS - TOP_OF_KERNEL_STACK_PADDING) 558 559__INITRODATA 560int_msg: 561 .asciz "Unknown interrupt or fault at: %p %p %p\n" 562 563#include "../../x86/xen/xen-head.S" 564 565/* 566 * The IDT and GDT 'descriptors' are a strange 48-bit object 567 * only used by the lidt and lgdt instructions. They are not 568 * like usual segment descriptors - they consist of a 16-bit 569 * segment size, and 32-bit linear address value: 570 */ 571 572 .data 573 ALIGN 574# early boot GDT descriptor (must use 1:1 address mapping) 575 .word 0 # 32 bit align gdt_desc.address 576SYM_DATA_START_LOCAL(boot_gdt_descr) 577 .word __BOOT_DS+7 578 .long boot_gdt - __PAGE_OFFSET 579SYM_DATA_END(boot_gdt_descr) 580 581# boot GDT descriptor (later on used by CPU#0): 582 .word 0 # 32 bit align gdt_desc.address 583SYM_DATA_START(early_gdt_descr) 584 .word GDT_ENTRIES*8-1 585 .long gdt_page /* Overwritten for secondary CPUs */ 586SYM_DATA_END(early_gdt_descr) 587 588/* 589 * The boot_gdt must mirror the equivalent in setup.S and is 590 * used only for booting. 591 */ 592 .align L1_CACHE_BYTES 593SYM_DATA_START(boot_gdt) 594 .fill GDT_ENTRY_BOOT_CS,8,0 595 .quad 0x00cf9a000000ffff /* kernel 4GB code at 0x00000000 */ 596 .quad 0x00cf92000000ffff /* kernel 4GB data at 0x00000000 */ 597SYM_DATA_END(boot_gdt) 598