Lines Matching refs:parent_map

42 static const struct parent_map mmcc_xo_mmpll0_mmpll1_gpll0_map[] = {
56 static const struct parent_map mmcc_xo_mmpll0_dsi_hdmi_gpll0_map[] = {
74 static const struct parent_map mmcc_xo_mmpll0_1_2_gpll0_map[] = {
90 static const struct parent_map mmcc_xo_mmpll0_1_3_gpll0_map[] = {
106 static const struct parent_map mmcc_xo_dsi_hdmi_edp_map[] = {
124 static const struct parent_map mmcc_xo_dsi_hdmi_edp_gpll0_map[] = {
142 static const struct parent_map mmcc_xo_dsibyte_hdmi_edp_gpll0_map[] = {
160 static const struct parent_map mmcc_xo_mmpll0_1_4_gpll0_map[] = {
176 static const struct parent_map mmcc_xo_mmpll0_1_4_gpll1_0_map[] = {
194 static const struct parent_map mmcc_xo_mmpll0_1_4_gpll1_0_sleep_map[] = {
317 	.parent_map = mmcc_xo_mmpll0_mmpll1_gpll0_map,
341 	.parent_map = mmcc_xo_mmpll0_mmpll1_gpll0_map,
365 	.parent_map = mmcc_xo_mmpll0_mmpll1_gpll0_map,
384 	.parent_map = mmcc_xo_mmpll0_1_4_gpll0_map,
397 	.parent_map = mmcc_xo_mmpll0_1_4_gpll0_map,
410 	.parent_map = mmcc_xo_mmpll0_1_4_gpll0_map,
423 	.parent_map = mmcc_xo_mmpll0_1_4_gpll0_map,
453 	.parent_map = mmcc_xo_mmpll0_1_4_gpll0_map,
466 	.parent_map = mmcc_xo_mmpll0_1_4_gpll0_map,
494 	.parent_map = mmcc_xo_mmpll0_dsi_hdmi_gpll0_map,
507 	.parent_map = mmcc_xo_mmpll0_1_2_gpll0_map,
529 	.parent_map = mmcc_xo_mmpll0_1_4_gpll0_map,
542 	.parent_map = mmcc_xo_mmpll0_1_4_gpll0_map,
555 	.parent_map = mmcc_xo_mmpll0_1_4_gpll0_map,
569 	.parent_map = mmcc_xo_dsi_hdmi_edp_gpll0_map,
583 	.parent_map = mmcc_xo_dsi_hdmi_edp_gpll0_map,
607 	.parent_map = mmcc_xo_mmpll0_1_3_gpll0_map,
626 	.parent_map = mmcc_xo_mmpll0_mmpll1_gpll0_map,
645 	.parent_map = mmcc_xo_mmpll0_1_4_gpll1_0_map,
669 	.parent_map = mmcc_xo_mmpll0_1_4_gpll1_0_sleep_map,
683 	.parent_map = mmcc_xo_mmpll0_1_4_gpll1_0_sleep_map,
711 	.parent_map = mmcc_xo_mmpll0_1_4_gpll1_0_map,
725 	.parent_map = mmcc_xo_mmpll0_1_4_gpll1_0_map,
739 	.parent_map = mmcc_xo_mmpll0_1_4_gpll1_0_map,
753 	.parent_map = mmcc_xo_mmpll0_1_4_gpll1_0_map,
772 	.parent_map = mmcc_xo_mmpll0_1_4_gpll0_map,
785 	.parent_map = mmcc_xo_mmpll0_1_4_gpll0_map,
798 	.parent_map = mmcc_xo_mmpll0_1_4_gpll0_map,
821 	.parent_map = mmcc_xo_mmpll0_1_4_gpll0_map,
834 	.parent_map = mmcc_xo_dsibyte_hdmi_edp_gpll0_map,
847 	.parent_map = mmcc_xo_dsibyte_hdmi_edp_gpll0_map,
865 	.parent_map = mmcc_xo_mmpll0_mmpll1_gpll0_map,
884 	.parent_map = mmcc_xo_dsi_hdmi_edp_gpll0_map,
904 	.parent_map = mmcc_xo_dsi_hdmi_edp_map,
922 	.parent_map = mmcc_xo_dsibyte_hdmi_edp_gpll0_map,
935 	.parent_map = mmcc_xo_dsibyte_hdmi_edp_gpll0_map,
953 	.parent_map = mmcc_xo_dsi_hdmi_edp_gpll0_map,
972 	.parent_map = mmcc_xo_mmpll0_mmpll1_gpll0_map,
990 	.parent_map = mmcc_xo_mmpll0_mmpll1_gpll0_map,
1008 	.parent_map = mmcc_xo_mmpll0_mmpll1_gpll0_map,
1026 	.parent_map = mmcc_xo_mmpll0_mmpll1_gpll0_map,
1049 	.parent_map = mmcc_xo_mmpll0_mmpll1_gpll0_map,
1071 	.parent_map = mmcc_xo_mmpll0_mmpll1_gpll0_map,
1090 	.parent_map = mmcc_xo_mmpll0_mmpll1_gpll0_map,