73 	address = adev->nbio.funcs->get_pcie_index_offset(adev);  in nv_pcie_rreg()
74 	data = adev->nbio.funcs->get_pcie_data_offset(adev);  in nv_pcie_rreg()
83 	address = adev->nbio.funcs->get_pcie_index_offset(adev);  in nv_pcie_wreg()
84 	data = adev->nbio.funcs->get_pcie_data_offset(adev);  in nv_pcie_wreg()
92 	address = adev->nbio.funcs->get_pcie_index_offset(adev);  in nv_pcie_rreg64()
93 	data = adev->nbio.funcs->get_pcie_data_offset(adev);  in nv_pcie_rreg64()
102 	address = adev->nbio.funcs->get_pcie_index_offset(adev);  in nv_pcie_wreg64()
103 	data = adev->nbio.funcs->get_pcie_data_offset(adev);  in nv_pcie_wreg64()
138 	return adev->nbio.funcs->get_memsize(adev);  in nv_get_config_memsize()
295 		u32 memsize = adev->nbio.funcs->get_memsize(adev);  in nv_asic_mode1_reset()
403 	adev->nbio.funcs->enable_doorbell_aperture(adev, enable);  in nv_enable_doorbell_aperture()
404 	adev->nbio.funcs->enable_doorbell_selfring_aperture(adev, enable);  in nv_enable_doorbell_aperture()
472 	adev->nbio.funcs = &nbio_v2_3_funcs;  in nv_set_ip_blocks()
473 	adev->nbio.hdp_flush_reg = &nbio_v2_3_hdp_flush_reg;  in nv_set_ip_blocks()
589 	return adev->nbio.funcs->get_rev_id(adev);  in nv_get_rev_id()
594 	adev->nbio.funcs->hdp_flush(adev, ring);  in nv_flush_hdp()
885 	adev->nbio.funcs->init_registers(adev);  in nv_common_hw_init()
890 	if (adev->nbio.funcs->remap_hdp_registers)  in nv_common_hw_init()
891 		adev->nbio.funcs->remap_hdp_registers(adev);  in nv_common_hw_init()
1065 		adev->nbio.funcs->update_medium_grain_clock_gating(adev,  in nv_common_set_clockgating_state()
1067 		adev->nbio.funcs->update_medium_grain_light_sleep(adev,  in nv_common_set_clockgating_state()
1095 	adev->nbio.funcs->get_clockgating_state(adev, flags);  in nv_common_get_clockgating_state()