83 	PP_ASSERT_WITH_CODE(state_arrays->ucNumEntries > 0,  in check_powerplay_tables()
322 			(bool)patom_record_v2[gfxclk_dep_table->ucNumEntries-1].ucACGEnable;  in init_over_drive_limits()
351 	PP_ASSERT_WITH_CODE((mm_dependency_table->ucNumEntries != 0),  in get_mm_clock_voltage_table()
356 			mm_dependency_table->ucNumEntries;  in get_mm_clock_voltage_table()
362 	mm_table->count = mm_dependency_table->ucNumEntries;  in get_mm_clock_voltage_table()
364 	for (i = 0; i < mm_dependency_table->ucNumEntries; i++) {  in get_mm_clock_voltage_table()
577 	PP_ASSERT_WITH_CODE(clk_dep_table->ucNumEntries,  in get_socclk_voltage_dependency_table()
582 			clk_dep_table->ucNumEntries;  in get_socclk_voltage_dependency_table()
589 	clk_table->count = (uint32_t)clk_dep_table->ucNumEntries;  in get_socclk_voltage_dependency_table()
591 	for (i = 0; i < clk_dep_table->ucNumEntries; i++) {  in get_socclk_voltage_dependency_table()
611 	PP_ASSERT_WITH_CODE(mclk_dep_table->ucNumEntries,  in get_mclk_voltage_dependency_table()
616 			mclk_dep_table->ucNumEntries;  in get_mclk_voltage_dependency_table()
623 	mclk_table->count = (uint32_t)mclk_dep_table->ucNumEntries;  in get_mclk_voltage_dependency_table()
625 	for (i = 0; i < mclk_dep_table->ucNumEntries; i++) {  in get_mclk_voltage_dependency_table()
652 	PP_ASSERT_WITH_CODE((clk_dep_table->ucNumEntries != 0),  in get_gfxclk_voltage_dependency_table()
657 			clk_dep_table->ucNumEntries;  in get_gfxclk_voltage_dependency_table()
664 	clk_table->count = clk_dep_table->ucNumEntries;  in get_gfxclk_voltage_dependency_table()
718 	PP_ASSERT_WITH_CODE((clk_dep_table->ucNumEntries != 0),  in get_pix_clk_voltage_dependency_table()
723 			clk_dep_table->ucNumEntries;  in get_pix_clk_voltage_dependency_table()
730 	clk_table->count = clk_dep_table->ucNumEntries;  in get_pix_clk_voltage_dependency_table()
758 	PP_ASSERT_WITH_CODE((clk_dep_table->ucNumEntries != 0),  in get_dcefclk_voltage_dependency_table()
771 		clk_dep_table->entries[clk_dep_table->ucNumEntries - 1].ulClk < 90000)  in get_dcefclk_voltage_dependency_table()
772 		num_entries = clk_dep_table->ucNumEntries + 1 > NUM_DSPCLK_LEVELS ?  in get_dcefclk_voltage_dependency_table()
773 				NUM_DSPCLK_LEVELS : clk_dep_table->ucNumEntries + 1;  in get_dcefclk_voltage_dependency_table()
775 		num_entries = clk_dep_table->ucNumEntries;  in get_dcefclk_voltage_dependency_table()
789 	for (i = 0; i < clk_dep_table->ucNumEntries; i++) {  in get_dcefclk_voltage_dependency_table()
817 	PP_ASSERT_WITH_CODE(atom_pcie_table->ucNumEntries,  in get_pcie_table()
823 			atom_pcie_table->ucNumEntries;  in get_pcie_table()
831 	if (atom_pcie_table->ucNumEntries <= pcie_count)  in get_pcie_table()
832 		pcie_count = atom_pcie_table->ucNumEntries;  in get_pcie_table()
859 	PP_ASSERT_WITH_CODE(limit_table->ucNumEntries,  in get_hard_limits()
1072 	PP_ASSERT_WITH_CODE((vddc_lookup_pp_tables->ucNumEntries != 0),  in get_vddc_lookup_table()
1083 	table->count = vddc_lookup_pp_tables->ucNumEntries;  in get_vddc_lookup_table()
1085 	for (i = 0; i < vddc_lookup_pp_tables->ucNumEntries; i++)  in get_vddc_lookup_table()
1297 	return (uint32_t)(state_arrays->ucNumEntries);  in vega10_get_number_of_powerplay_table_entries()
1353 		PP_ASSERT_WITH_CODE(state_arrays->ucNumEntries > 0,  in vega10_get_powerplay_table_entry()
1356 		PP_ASSERT_WITH_CODE((entry_index <= state_arrays->ucNumEntries),  in vega10_get_powerplay_table_entry()