Lines Matching refs:state
44 enum stv0367_cab_signal_type state; member
59 enum stv0367_ter_signal_type state; member
122 int stv0367_writeregs(struct stv0367_state *state, u16 reg, u8 *data, int len) in stv0367_writeregs() argument
126 .addr = state->config->demod_address, in stv0367_writeregs()
147 state->config->demod_address, reg, buf[2]); in stv0367_writeregs()
149 ret = i2c_transfer(state->i2c, &msg, 1); in stv0367_writeregs()
152 __func__, state->config->demod_address, reg, buf[2]); in stv0367_writeregs()
157 static int stv0367_writereg(struct stv0367_state *state, u16 reg, u8 data) in stv0367_writereg() argument
161 return stv0367_writeregs(state, reg, &tmp, 1); in stv0367_writereg()
164 static u8 stv0367_readreg(struct stv0367_state *state, u16 reg) in stv0367_readreg() argument
170 .addr = state->config->demod_address, in stv0367_readreg()
175 .addr = state->config->demod_address, in stv0367_readreg()
186 ret = i2c_transfer(state->i2c, msg, 2); in stv0367_readreg()
189 __func__, state->config->demod_address, reg, b1[0]); in stv0367_readreg()
193 state->config->demod_address, reg, b1[0]); in stv0367_readreg()
212 static void stv0367_writebits(struct stv0367_state *state, u32 label, u8 val) in stv0367_writebits() argument
216 reg = stv0367_readreg(state, (label >> 16) & 0xffff); in stv0367_writebits()
222 stv0367_writereg(state, (label >> 16) & 0xffff, reg); in stv0367_writebits()
237 static u8 stv0367_readbits(struct stv0367_state *state, u32 label) in stv0367_readbits() argument
244 val = stv0367_readreg(state, label >> 16); in stv0367_readbits()
261 static void stv0367_write_table(struct stv0367_state *state, in stv0367_write_table() argument
269 stv0367_writereg(state, deftab[i].addr, deftab[i].value); in stv0367_write_table()
274 static void stv0367_pll_setup(struct stv0367_state *state, in stv0367_pll_setup() argument
288 stv0367_writereg(state, R367TER_PLLMDIV, 0x1b); in stv0367_pll_setup()
289 stv0367_writereg(state, R367TER_PLLNDIV, 0xe8); in stv0367_pll_setup()
298 stv0367_writereg(state, R367TER_PLLMDIV, 0x2); in stv0367_pll_setup()
299 stv0367_writereg(state, R367TER_PLLNDIV, 0x1b); in stv0367_pll_setup()
302 stv0367_writereg(state, R367TER_PLLMDIV, 0xa); in stv0367_pll_setup()
303 stv0367_writereg(state, R367TER_PLLNDIV, 0x55); in stv0367_pll_setup()
308 stv0367_writereg(state, R367TER_PLLMDIV, 0x1); in stv0367_pll_setup()
309 stv0367_writereg(state, R367TER_PLLNDIV, 0x8); in stv0367_pll_setup()
312 stv0367_writereg(state, R367TER_PLLMDIV, 0xc); in stv0367_pll_setup()
313 stv0367_writereg(state, R367TER_PLLNDIV, 0x55); in stv0367_pll_setup()
318 stv0367_writereg(state, R367TER_PLLSETUP, 0x18); in stv0367_pll_setup()
321 static int stv0367_get_if_khz(struct stv0367_state *state, u32 *ifkhz) in stv0367_get_if_khz() argument
323 if (state->auto_if_khz && state->fe.ops.tuner_ops.get_if_frequency) { in stv0367_get_if_khz()
324 state->fe.ops.tuner_ops.get_if_frequency(&state->fe, ifkhz); in stv0367_get_if_khz()
327 *ifkhz = state->config->if_khz; in stv0367_get_if_khz()
334 struct stv0367_state *state = fe->demodulator_priv; in stv0367ter_gate_ctrl() local
335 u8 tmp = stv0367_readreg(state, R367TER_I2CRPT); in stv0367ter_gate_ctrl()
347 stv0367_writereg(state, R367TER_I2CRPT, tmp); in stv0367ter_gate_ctrl()
452 static u32 stv0367ter_get_mclk(struct stv0367_state *state, u32 ExtClk_Hz) in stv0367ter_get_mclk() argument
459 if (stv0367_readbits(state, F367TER_BYPASS_PLLXN) == 0) { in stv0367ter_get_mclk()
460 n = (u32)stv0367_readbits(state, F367TER_PLL_NDIV); in stv0367ter_get_mclk()
464 m = (u32)stv0367_readbits(state, F367TER_PLL_MDIV); in stv0367ter_get_mclk()
468 p = (u32)stv0367_readbits(state, F367TER_PLL_PDIV); in stv0367ter_get_mclk()
484 static int stv0367ter_filt_coeff_init(struct stv0367_state *state, in stv0367ter_filt_coeff_init() argument
491 freq = stv0367ter_get_mclk(state, DemodXtal); in stv0367ter_filt_coeff_init()
503 stv0367_writebits(state, F367TER_IIR_CELL_NB, i - 1); in stv0367ter_filt_coeff_init()
506 stv0367_writereg(state, in stv0367ter_filt_coeff_init()
509 stv0367_writereg(state, in stv0367ter_filt_coeff_init()
519 static void stv0367ter_agc_iir_lock_detect_set(struct stv0367_state *state) in stv0367ter_agc_iir_lock_detect_set() argument
523 stv0367_writebits(state, F367TER_LOCK_DETECT_LSB, 0x00); in stv0367ter_agc_iir_lock_detect_set()
526 stv0367_writebits(state, F367TER_LOCK_DETECT_CHOICE, 0x00); in stv0367ter_agc_iir_lock_detect_set()
527 stv0367_writebits(state, F367TER_LOCK_DETECT_MSB, 0x06); in stv0367ter_agc_iir_lock_detect_set()
528 stv0367_writebits(state, F367TER_AUT_AGC_TARGET_LSB, 0x04); in stv0367ter_agc_iir_lock_detect_set()
531 stv0367_writebits(state, F367TER_LOCK_DETECT_CHOICE, 0x01); in stv0367ter_agc_iir_lock_detect_set()
532 stv0367_writebits(state, F367TER_LOCK_DETECT_MSB, 0x06); in stv0367ter_agc_iir_lock_detect_set()
533 stv0367_writebits(state, F367TER_AUT_AGC_TARGET_LSB, 0x04); in stv0367ter_agc_iir_lock_detect_set()
536 stv0367_writebits(state, F367TER_LOCK_DETECT_CHOICE, 0x02); in stv0367ter_agc_iir_lock_detect_set()
537 stv0367_writebits(state, F367TER_LOCK_DETECT_MSB, 0x01); in stv0367ter_agc_iir_lock_detect_set()
538 stv0367_writebits(state, F367TER_AUT_AGC_TARGET_LSB, 0x00); in stv0367ter_agc_iir_lock_detect_set()
541 stv0367_writebits(state, F367TER_LOCK_DETECT_CHOICE, 0x03); in stv0367ter_agc_iir_lock_detect_set()
542 stv0367_writebits(state, F367TER_LOCK_DETECT_MSB, 0x01); in stv0367ter_agc_iir_lock_detect_set()
543 stv0367_writebits(state, F367TER_AUT_AGC_TARGET_LSB, 0x00); in stv0367ter_agc_iir_lock_detect_set()
547 static int stv0367_iir_filt_init(struct stv0367_state *state, u8 Bandwidth, in stv0367_iir_filt_init() argument
552 stv0367_writebits(state, F367TER_NRST_IIR, 0); in stv0367_iir_filt_init()
556 if (!stv0367ter_filt_coeff_init(state, in stv0367_iir_filt_init()
562 if (!stv0367ter_filt_coeff_init(state, in stv0367_iir_filt_init()
568 if (!stv0367ter_filt_coeff_init(state, in stv0367_iir_filt_init()
577 stv0367_writebits(state, F367TER_NRST_IIR, 1); in stv0367_iir_filt_init()
582 static void stv0367ter_agc_iir_rst(struct stv0367_state *state) in stv0367ter_agc_iir_rst() argument
589 com_n = stv0367_readbits(state, F367TER_COM_N); in stv0367ter_agc_iir_rst()
591 stv0367_writebits(state, F367TER_COM_N, 0x07); in stv0367ter_agc_iir_rst()
593 stv0367_writebits(state, F367TER_COM_SOFT_RSTN, 0x00); in stv0367ter_agc_iir_rst()
594 stv0367_writebits(state, F367TER_COM_AGC_ON, 0x00); in stv0367ter_agc_iir_rst()
596 stv0367_writebits(state, F367TER_COM_SOFT_RSTN, 0x01); in stv0367ter_agc_iir_rst()
597 stv0367_writebits(state, F367TER_COM_AGC_ON, 0x01); in stv0367ter_agc_iir_rst()
599 stv0367_writebits(state, F367TER_COM_N, com_n); in stv0367ter_agc_iir_rst()
626 stv0367_ter_signal_type stv0367ter_check_syr(struct stv0367_state *state) in stv0367ter_check_syr() argument
634 SYR_var = stv0367_readbits(state, F367TER_SYR_LOCK); in stv0367ter_check_syr()
639 SYR_var = stv0367_readbits(state, F367TER_SYR_LOCK); in stv0367ter_check_syr()
654 stv0367_ter_signal_type stv0367ter_check_cpamp(struct stv0367_state *state, in stv0367ter_check_cpamp() argument
683 CPAMPvalue = stv0367_readbits(state, F367TER_PPM_CPAMP_DIRECT); in stv0367ter_check_cpamp()
687 CPAMPvalue = stv0367_readbits(state, F367TER_PPM_CPAMP_DIRECT); in stv0367ter_check_cpamp()
703 stv0367ter_lock_algo(struct stv0367_state *state) in stv0367ter_lock_algo() argument
712 if (state == NULL) in stv0367ter_lock_algo()
719 stv0367_writebits(state, F367TER_CORE_ACTIVE, 0); in stv0367ter_lock_algo()
721 if (state->config->if_iq_mode != 0) in stv0367ter_lock_algo()
722 stv0367_writebits(state, F367TER_COM_N, 0x07); in stv0367ter_lock_algo()
724 stv0367_writebits(state, F367TER_GUARD, 3);/* suggest 2k 1/4 */ in stv0367ter_lock_algo()
725 stv0367_writebits(state, F367TER_MODE, 0); in stv0367ter_lock_algo()
726 stv0367_writebits(state, F367TER_SYR_TR_DIS, 0); in stv0367ter_lock_algo()
729 stv0367_writebits(state, F367TER_CORE_ACTIVE, 1); in stv0367ter_lock_algo()
732 if (stv0367ter_check_syr(state) == FE_TER_NOSYMBOL) in stv0367ter_lock_algo()
737 mode = stv0367_readbits(state, F367TER_SYR_MODE); in stv0367ter_lock_algo()
738 if (stv0367ter_check_cpamp(state, mode) == in stv0367ter_lock_algo()
749 tmp = stv0367_readreg(state, R367TER_SYR_STAT); in stv0367ter_lock_algo()
750 tmp2 = stv0367_readreg(state, R367TER_STATUS); in stv0367ter_lock_algo()
751 dprintk("state=%p\n", state); in stv0367ter_lock_algo()
755 tmp = stv0367_readreg(state, R367TER_PRVIT); in stv0367ter_lock_algo()
756 tmp2 = stv0367_readreg(state, R367TER_I2CRPT); in stv0367ter_lock_algo()
759 tmp = stv0367_readreg(state, R367TER_GAIN_SRC1); in stv0367ter_lock_algo()
774 stv0367_writebits(state, F367TER_AUTO_LE_EN, 0); in stv0367ter_lock_algo()
775 stv0367_writereg(state, R367TER_CHC_CTL, 0x01); in stv0367ter_lock_algo()
779 stv0367_writebits(state, F367TER_AUTO_LE_EN, 1); in stv0367ter_lock_algo()
780 stv0367_writereg(state, R367TER_CHC_CTL, 0x11); in stv0367ter_lock_algo()
789 stv0367_writebits(state, F367TER_RST_SFEC, 1); in stv0367ter_lock_algo()
790 stv0367_writebits(state, F367TER_RST_REEDSOLO, 1); in stv0367ter_lock_algo()
792 stv0367_writebits(state, F367TER_RST_SFEC, 0); in stv0367ter_lock_algo()
793 stv0367_writebits(state, F367TER_RST_REEDSOLO, 0); in stv0367ter_lock_algo()
795 u_var1 = stv0367_readbits(state, F367TER_LK); in stv0367ter_lock_algo()
796 u_var2 = stv0367_readbits(state, F367TER_PRF); in stv0367ter_lock_algo()
797 u_var3 = stv0367_readbits(state, F367TER_TPS_LOCK); in stv0367ter_lock_algo()
807 u_var1 = stv0367_readbits(state, F367TER_LK); in stv0367ter_lock_algo()
808 u_var2 = stv0367_readbits(state, F367TER_PRF); in stv0367ter_lock_algo()
809 u_var3 = stv0367_readbits(state, F367TER_TPS_LOCK); in stv0367ter_lock_algo()
823 guard = stv0367_readbits(state, F367TER_SYR_GUARD); in stv0367ter_lock_algo()
824 stv0367_writereg(state, R367TER_CHC_CTL, 0x11); in stv0367ter_lock_algo()
828 stv0367_writebits(state, F367TER_AUTO_LE_EN, 0); in stv0367ter_lock_algo()
830 stv0367_writebits(state, F367TER_SYR_FILTER, 0); in stv0367ter_lock_algo()
834 stv0367_writebits(state, F367TER_AUTO_LE_EN, 1); in stv0367ter_lock_algo()
836 stv0367_writebits(state, F367TER_SYR_FILTER, 1); in stv0367ter_lock_algo()
844 if ((stv0367_readbits(state, F367TER_TPS_CONST) == 2) && in stv0367ter_lock_algo()
846 (stv0367_readbits(state, F367TER_TPS_HPCODE) != 0)) { in stv0367ter_lock_algo()
847 stv0367_writereg(state, R367TER_SFDLYSETH, 0xc0); in stv0367ter_lock_algo()
848 stv0367_writereg(state, R367TER_SFDLYSETM, 0x60); in stv0367ter_lock_algo()
849 stv0367_writereg(state, R367TER_SFDLYSETL, 0x0); in stv0367ter_lock_algo()
851 stv0367_writereg(state, R367TER_SFDLYSETH, 0x0); in stv0367ter_lock_algo()
854 u_var4 = stv0367_readbits(state, F367TER_TSFIFO_LINEOK); in stv0367ter_lock_algo()
859 u_var4 = stv0367_readbits(state, F367TER_TSFIFO_LINEOK); in stv0367ter_lock_algo()
877 stv0367_writebits(state, F367TER_SYR_TR_DIS, 1); in stv0367ter_lock_algo()
885 static void stv0367ter_set_ts_mode(struct stv0367_state *state, in stv0367ter_set_ts_mode() argument
891 if (state == NULL) in stv0367ter_set_ts_mode()
894 stv0367_writebits(state, F367TER_TS_DIS, 0); in stv0367ter_set_ts_mode()
899 stv0367_writebits(state, F367TER_TSFIFO_SERIAL, 0); in stv0367ter_set_ts_mode()
900 stv0367_writebits(state, F367TER_TSFIFO_DVBCI, 0); in stv0367ter_set_ts_mode()
903 stv0367_writebits(state, F367TER_TSFIFO_SERIAL, 1); in stv0367ter_set_ts_mode()
904 stv0367_writebits(state, F367TER_TSFIFO_DVBCI, 1); in stv0367ter_set_ts_mode()
909 static void stv0367ter_set_clk_pol(struct stv0367_state *state, in stv0367ter_set_clk_pol() argument
915 if (state == NULL) in stv0367ter_set_clk_pol()
920 stv0367_writebits(state, F367TER_TS_BYTE_CLK_INV, 1); in stv0367ter_set_clk_pol()
923 stv0367_writebits(state, F367TER_TS_BYTE_CLK_INV, 0); in stv0367ter_set_clk_pol()
927 stv0367_writebits(state, F367TER_TS_BYTE_CLK_INV, 0); in stv0367ter_set_clk_pol()
933 static void stv0367ter_core_sw(struct stv0367_state *state)
938 stv0367_writebits(state, F367TER_CORE_ACTIVE, 0);
939 stv0367_writebits(state, F367TER_CORE_ACTIVE, 1);
945 struct stv0367_state *state = fe->demodulator_priv; in stv0367ter_standby() local
950 stv0367_writebits(state, F367TER_STDBY, 1); in stv0367ter_standby()
951 stv0367_writebits(state, F367TER_STDBY_FEC, 1); in stv0367ter_standby()
952 stv0367_writebits(state, F367TER_STDBY_CORE, 1); in stv0367ter_standby()
954 stv0367_writebits(state, F367TER_STDBY, 0); in stv0367ter_standby()
955 stv0367_writebits(state, F367TER_STDBY_FEC, 0); in stv0367ter_standby()
956 stv0367_writebits(state, F367TER_STDBY_CORE, 0); in stv0367ter_standby()
969 struct stv0367_state *state = fe->demodulator_priv; in stv0367ter_init() local
970 struct stv0367ter_state *ter_state = state->ter_state; in stv0367ter_init()
976 stv0367_write_table(state, in stv0367ter_init()
977 stv0367_deftabs[state->deftabs][STV0367_TAB_TER]); in stv0367ter_init()
979 stv0367_pll_setup(state, STV0367_ICSPEED_53125, state->config->xtal); in stv0367ter_init()
981 stv0367_writereg(state, R367TER_I2CRPT, 0xa0); in stv0367ter_init()
982 stv0367_writereg(state, R367TER_ANACTRL, 0x00); in stv0367ter_init()
985 stv0367ter_set_ts_mode(state, state->config->ts_mode); in stv0367ter_init()
986 stv0367ter_set_clk_pol(state, state->config->clk_pol); in stv0367ter_init()
988 state->chip_id = stv0367_readreg(state, R367TER_ID); in stv0367ter_init()
998 struct stv0367_state *state = fe->demodulator_priv; in stv0367ter_algo() local
999 struct stv0367ter_state *ter_state = state->ter_state; in stv0367ter_algo()
1009 stv0367_get_if_khz(state, &ifkhz); in stv0367ter_algo()
1013 + stv0367_readbits(state, F367TER_FORCE) * 2; in stv0367ter_algo()
1014 ter_state->if_iq_mode = state->config->if_iq_mode; in stv0367ter_algo()
1015 switch (state->config->if_iq_mode) { in stv0367ter_algo()
1018 stv0367_writebits(state, F367TER_TUNER_BB, 0); in stv0367ter_algo()
1019 stv0367_writebits(state, F367TER_LONGPATH_IF, 0); in stv0367ter_algo()
1020 stv0367_writebits(state, F367TER_DEMUX_SWAP, 0); in stv0367ter_algo()
1024 stv0367_writebits(state, F367TER_TUNER_BB, 0); in stv0367ter_algo()
1025 stv0367_writebits(state, F367TER_LONGPATH_IF, 1); in stv0367ter_algo()
1026 stv0367_writebits(state, F367TER_DEMUX_SWAP, 1); in stv0367ter_algo()
1030 stv0367_writebits(state, F367TER_TUNER_BB, 1); in stv0367ter_algo()
1031 stv0367_writebits(state, F367TER_PPM_INVSEL, 0); in stv0367ter_algo()
1045 stv0367_writebits(state, F367TER_IQ_INVERT, in stv0367ter_algo()
1048 stv0367_writebits(state, F367TER_INV_SPECTR, in stv0367ter_algo()
1055 stv0367_writebits(state, F367TER_IQ_INVERT, in stv0367ter_algo()
1058 stv0367_writebits(state, F367TER_INV_SPECTR, in stv0367ter_algo()
1066 stv0367ter_agc_iir_lock_detect_set(state); in stv0367ter_algo()
1070 stv0367_writebits(state, F367TER_SEL_IQNTAR, 1); in stv0367ter_algo()
1071 stv0367_writebits(state, F367TER_AUT_AGC_TARGET_MSB, 0xB); in stv0367ter_algo()
1075 stv0367_writebits(state, F367TER_SEL_IQNTAR, 0); in stv0367ter_algo()
1076 stv0367_writebits(state, F367TER_AUT_AGC_TARGET_MSB, 0xB); in stv0367ter_algo()
1079 if (!stv0367_iir_filt_init(state, ter_state->bw, in stv0367ter_algo()
1080 state->config->xtal)) in stv0367ter_algo()
1085 stv0367ter_agc_iir_rst(state); in stv0367ter_algo()
1089 stv0367_writebits(state, F367TER_BDI_LPSEL, 0x01); in stv0367ter_algo()
1091 stv0367_writebits(state, F367TER_BDI_LPSEL, 0x00); in stv0367ter_algo()
1093 InternalFreq = stv0367ter_get_mclk(state, state->config->xtal) / 1000; in stv0367ter_algo()
1098 stv0367_writebits(state, F367TER_TRL_NOMRATE_LSB, temp % 2); in stv0367ter_algo()
1100 stv0367_writebits(state, F367TER_TRL_NOMRATE_HI, temp / 256); in stv0367ter_algo()
1101 stv0367_writebits(state, F367TER_TRL_NOMRATE_LO, temp % 256); in stv0367ter_algo()
1103 temp = stv0367_readbits(state, F367TER_TRL_NOMRATE_HI) * 512 + in stv0367ter_algo()
1104 stv0367_readbits(state, F367TER_TRL_NOMRATE_LO) * 2 + in stv0367ter_algo()
1105 stv0367_readbits(state, F367TER_TRL_NOMRATE_LSB); in stv0367ter_algo()
1107 stv0367_writebits(state, F367TER_GAIN_SRC_HI, temp / 256); in stv0367ter_algo()
1108 stv0367_writebits(state, F367TER_GAIN_SRC_LO, temp % 256); in stv0367ter_algo()
1109 temp = stv0367_readbits(state, F367TER_GAIN_SRC_HI) * 256 + in stv0367ter_algo()
1110 stv0367_readbits(state, F367TER_GAIN_SRC_LO); in stv0367ter_algo()
1116 stv0367_writebits(state, F367TER_INC_DEROT_HI, temp / 256); in stv0367ter_algo()
1117 stv0367_writebits(state, F367TER_INC_DEROT_LO, temp % 256); in stv0367ter_algo()
1122 stv0367_writebits(state, F367TER_LONG_ECHO, ter_state->echo_pos); in stv0367ter_algo()
1124 if (stv0367ter_lock_algo(state) != FE_TER_LOCKOK) in stv0367ter_algo()
1127 ter_state->state = FE_TER_LOCKOK; in stv0367ter_algo()
1129 ter_state->mode = stv0367_readbits(state, F367TER_SYR_MODE); in stv0367ter_algo()
1130 ter_state->guard = stv0367_readbits(state, F367TER_SYR_GUARD); in stv0367ter_algo()
1135 (stv0367_readbits(state, F367TER_AGC1_VAL_LO) << 16) + in stv0367ter_algo()
1136 (stv0367_readbits(state, F367TER_AGC1_VAL_HI) << 24) + in stv0367ter_algo()
1137 stv0367_readbits(state, F367TER_AGC2_VAL_LO) + in stv0367ter_algo()
1138 (stv0367_readbits(state, F367TER_AGC2_VAL_HI) << 8); in stv0367ter_algo()
1141 stv0367_writebits(state, F367TER_FREEZE, 1); in stv0367ter_algo()
1142 offset = (stv0367_readbits(state, F367TER_CRL_FOFFSET_VHI) << 16) ; in stv0367ter_algo()
1143 offset += (stv0367_readbits(state, F367TER_CRL_FOFFSET_HI) << 8); in stv0367ter_algo()
1144 offset += (stv0367_readbits(state, F367TER_CRL_FOFFSET_LO)); in stv0367ter_algo()
1145 stv0367_writebits(state, F367TER_FREEZE, 0); in stv0367ter_algo()
1158 if (stv0367_readbits(state, F367TER_PPM_INVSEL) == 1) { in stv0367ter_algo()
1159 if ((stv0367_readbits(state, F367TER_INV_SPECTR) == in stv0367ter_algo()
1160 (stv0367_readbits(state, in stv0367ter_algo()
1176 timing_offset = stv0367_readbits(state, F367TER_TRL_TOFFSET_LO) in stv0367ter_algo()
1177 + 256 * stv0367_readbits(state, in stv0367ter_algo()
1181 trl_nomrate = (512 * stv0367_readbits(state, in stv0367ter_algo()
1183 + stv0367_readbits(state, F367TER_TRL_NOMRATE_LO) * 2 in stv0367ter_algo()
1184 + stv0367_readbits(state, F367TER_TRL_NOMRATE_LSB)); in stv0367ter_algo()
1201 stv0367_writebits(state, F367TER_TRL_NOMRATE_LSB, in stv0367ter_algo()
1203 stv0367_writebits(state, F367TER_TRL_NOMRATE_LO, in stv0367ter_algo()
1211 u_var = stv0367_readbits(state, F367TER_LK); in stv0367ter_algo()
1214 stv0367_writebits(state, F367TER_CORE_ACTIVE, 0); in stv0367ter_algo()
1216 stv0367_writebits(state, F367TER_CORE_ACTIVE, 1); in stv0367ter_algo()
1225 struct stv0367_state *state = fe->demodulator_priv; in stv0367ter_set_frontend() local
1226 struct stv0367ter_state *ter_state = state->ter_state; in stv0367ter_set_frontend()
1232 if (state->reinit_on_setfrontend) in stv0367ter_set_frontend()
1236 if (state->use_i2c_gatectrl && fe->ops.i2c_gate_ctrl) in stv0367ter_set_frontend()
1239 if (state->use_i2c_gatectrl && fe->ops.i2c_gate_ctrl) in stv0367ter_set_frontend()
1296 ter_state->state = FE_TER_NOLOCK; in stv0367ter_set_frontend()
1299 while (((index) < num_trials) && (ter_state->state != FE_TER_LOCKOK)) { in stv0367ter_set_frontend()
1307 if ((ter_state->state == FE_TER_LOCKOK) && in stv0367ter_set_frontend()
1323 struct stv0367_state *state = fe->demodulator_priv; in stv0367ter_read_ucblocks() local
1324 struct stv0367ter_state *ter_state = state->ter_state; in stv0367ter_read_ucblocks()
1328 if (stv0367_readbits(state, F367TER_SFERRC_OLDVALUE) == 0) { in stv0367ter_read_ucblocks()
1330 ((u32)stv0367_readbits(state, F367TER_ERR_CNT1) in stv0367ter_read_ucblocks()
1332 + ((u32)stv0367_readbits(state, F367TER_ERR_CNT1_HI) in stv0367ter_read_ucblocks()
1334 + ((u32)stv0367_readbits(state, F367TER_ERR_CNT1_LO)); in stv0367ter_read_ucblocks()
1346 struct stv0367_state *state = fe->demodulator_priv; in stv0367ter_get_frontend() local
1347 struct stv0367ter_state *ter_state = state->ter_state; in stv0367ter_get_frontend()
1355 constell = stv0367_readbits(state, F367TER_TPS_CONST); in stv0367ter_get_frontend()
1363 p->inversion = stv0367_readbits(state, F367TER_INV_SPECTR); in stv0367ter_get_frontend()
1366 Data = stv0367_readbits(state, F367TER_TPS_HIERMODE); in stv0367ter_get_frontend()
1388 Data = stv0367_readbits(state, F367TER_TPS_LPCODE); in stv0367ter_get_frontend()
1390 Data = stv0367_readbits(state, F367TER_TPS_HPCODE); in stv0367ter_get_frontend()
1413 mode = stv0367_readbits(state, F367TER_SYR_MODE); in stv0367ter_get_frontend()
1429 p->guard_interval = stv0367_readbits(state, F367TER_SYR_GUARD); in stv0367ter_get_frontend()
1436 struct stv0367_state *state = fe->demodulator_priv; in stv0367ter_snr_readreg() local
1439 u8 cut = stv0367_readbits(state, F367TER_IDENTIFICATIONREG); in stv0367ter_snr_readreg()
1444 snru32 += stv0367_readbits(state, F367TER_CHCSNR) / 4; in stv0367ter_snr_readreg()
1446 snru32 += 125 * stv0367_readbits(state, F367TER_CHCSNR); in stv0367ter_snr_readreg()
1468 struct stv0367_state *state = fe->demodulator_priv;
1469 struct stv0367ter_state *ter_state = state->ter_state;
1472 locked = (stv0367_readbits(state, F367TER_LK));
1479 if (!stv0367_readbits(state, F367TER_TPS_LOCK) ||
1480 (!stv0367_readbits(state, F367TER_LK))) {
1481 stv0367_writebits(state, F367TER_CORE_ACTIVE, 0);
1483 stv0367_writebits(state, F367TER_CORE_ACTIVE, 1);
1485 locked = (stv0367_readbits(state, F367TER_TPS_LOCK)) &&
1486 (stv0367_readbits(state, F367TER_LK));
1497 struct stv0367_state *state = fe->demodulator_priv; in stv0367ter_read_status() local
1503 if (stv0367_readbits(state, F367TER_LK)) { in stv0367ter_read_status()
1514 struct stv0367_state *state = fe->demodulator_priv; in stv0367ter_read_ber() local
1515 struct stv0367ter_state *ter_state = state->ter_state; in stv0367ter_read_ber()
1521 if (stv0367_readbits(state, F367TER_SFERRC_OLDVALUE) == 0) in stv0367ter_read_ber()
1522 Errors = ((u32)stv0367_readbits(state, F367TER_SFEC_ERR_CNT) in stv0367ter_read_ber()
1524 + ((u32)stv0367_readbits(state, F367TER_SFEC_ERR_CNT_HI) in stv0367ter_read_ber()
1526 + ((u32)stv0367_readbits(state, in stv0367ter_read_ber()
1534 abc = stv0367_readbits(state, F367TER_SFEC_ERR_SOURCE); in stv0367ter_read_ber()
1535 def = stv0367_readbits(state, F367TER_SFEC_NUM_EVENT); in stv0367ter_read_ber()
1595 static u32 stv0367ter_get_per(struct stv0367_state *state)
1597 struct stv0367ter_state *ter_state = state->ter_state;
1601 while (((stv0367_readbits(state, F367TER_SFERRC_OLDVALUE) == 1) &&
1604 Errors = ((u32)stv0367_readbits(state, F367TER_ERR_CNT1)
1606 + ((u32)stv0367_readbits(state, F367TER_ERR_CNT1_HI)
1608 + ((u32)stv0367_readbits(state, F367TER_ERR_CNT1_LO));
1611 abc = stv0367_readbits(state, F367TER_ERR_SRC1);
1612 def = stv0367_readbits(state, F367TER_NUM_EVT1);
1675 struct stv0367_state *state = fe->demodulator_priv; in stv0367_release() local
1677 kfree(state->ter_state); in stv0367_release()
1678 kfree(state->cab_state); in stv0367_release()
1679 kfree(state); in stv0367_release()
1715 struct stv0367_state *state = NULL; in stv0367ter_attach() local
1719 state = kzalloc(sizeof(struct stv0367_state), GFP_KERNEL); in stv0367ter_attach()
1720 if (state == NULL) in stv0367ter_attach()
1727 state->i2c = i2c; in stv0367ter_attach()
1728 state->config = config; in stv0367ter_attach()
1729 state->ter_state = ter_state; in stv0367ter_attach()
1730 state->fe.ops = stv0367ter_ops; in stv0367ter_attach()
1731 state->fe.demodulator_priv = state; in stv0367ter_attach()
1732 state->chip_id = stv0367_readreg(state, 0xf000); in stv0367ter_attach()
1735 state->use_i2c_gatectrl = 1; in stv0367ter_attach()
1736 state->deftabs = STV0367_DEFTAB_GENERIC; in stv0367ter_attach()
1737 state->reinit_on_setfrontend = 1; in stv0367ter_attach()
1738 state->auto_if_khz = 0; in stv0367ter_attach()
1740 dprintk("%s: chip_id = 0x%x\n", __func__, state->chip_id); in stv0367ter_attach()
1743 if ((state->chip_id != 0x50) && (state->chip_id != 0x60)) in stv0367ter_attach()
1746 return &state->fe; in stv0367ter_attach()
1750 kfree(state); in stv0367ter_attach()
1757 struct stv0367_state *state = fe->demodulator_priv; in stv0367cab_gate_ctrl() local
1761 stv0367_writebits(state, F367CAB_I2CT_ON, (enable > 0) ? 1 : 0); in stv0367cab_gate_ctrl()
1768 struct stv0367_state *state = fe->demodulator_priv; in stv0367cab_get_mclk() local
1773 if (stv0367_readbits(state, F367CAB_BYPASS_PLLXN) == 0) { in stv0367cab_get_mclk()
1774 N = (u32)stv0367_readbits(state, F367CAB_PLL_NDIV); in stv0367cab_get_mclk()
1778 M = (u32)stv0367_readbits(state, F367CAB_PLL_MDIV); in stv0367cab_get_mclk()
1782 P = (u32)stv0367_readbits(state, F367CAB_PLL_PDIV); in stv0367cab_get_mclk()
1807 static enum stv0367cab_mod stv0367cab_SetQamSize(struct stv0367_state *state, in stv0367cab_SetQamSize() argument
1812 stv0367_writebits(state, F367CAB_QAM_MODE, QAMSize); in stv0367cab_SetQamSize()
1817 stv0367_writereg(state, R367CAB_IQDEM_ADJ_AGC_REF, 0x00); in stv0367cab_SetQamSize()
1820 stv0367_writereg(state, R367CAB_AGC_PWR_REF_L, 0x64); in stv0367cab_SetQamSize()
1821 stv0367_writereg(state, R367CAB_IQDEM_ADJ_AGC_REF, 0x00); in stv0367cab_SetQamSize()
1822 stv0367_writereg(state, R367CAB_FSM_STATE, 0x90); in stv0367cab_SetQamSize()
1823 stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xc1); in stv0367cab_SetQamSize()
1824 stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0xa7); in stv0367cab_SetQamSize()
1825 stv0367_writereg(state, R367CAB_EQU_CRL_LD_SEN, 0x95); in stv0367cab_SetQamSize()
1826 stv0367_writereg(state, R367CAB_EQU_CRL_LIMITER, 0x40); in stv0367cab_SetQamSize()
1827 stv0367_writereg(state, R367CAB_EQU_PNT_GAIN, 0x8a); in stv0367cab_SetQamSize()
1830 stv0367_writereg(state, R367CAB_IQDEM_ADJ_AGC_REF, 0x00); in stv0367cab_SetQamSize()
1831 stv0367_writereg(state, R367CAB_AGC_PWR_REF_L, 0x6e); in stv0367cab_SetQamSize()
1832 stv0367_writereg(state, R367CAB_FSM_STATE, 0xb0); in stv0367cab_SetQamSize()
1833 stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xc1); in stv0367cab_SetQamSize()
1834 stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0xb7); in stv0367cab_SetQamSize()
1835 stv0367_writereg(state, R367CAB_EQU_CRL_LD_SEN, 0x9d); in stv0367cab_SetQamSize()
1836 stv0367_writereg(state, R367CAB_EQU_CRL_LIMITER, 0x7f); in stv0367cab_SetQamSize()
1837 stv0367_writereg(state, R367CAB_EQU_PNT_GAIN, 0xa7); in stv0367cab_SetQamSize()
1840 stv0367_writereg(state, R367CAB_IQDEM_ADJ_AGC_REF, 0x82); in stv0367cab_SetQamSize()
1841 stv0367_writereg(state, R367CAB_AGC_PWR_REF_L, 0x5a); in stv0367cab_SetQamSize()
1843 stv0367_writereg(state, R367CAB_FSM_STATE, 0xb0); in stv0367cab_SetQamSize()
1844 stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xc1); in stv0367cab_SetQamSize()
1845 stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0xa5); in stv0367cab_SetQamSize()
1847 stv0367_writereg(state, R367CAB_FSM_STATE, 0xa0); in stv0367cab_SetQamSize()
1848 stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xc1); in stv0367cab_SetQamSize()
1849 stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0xa6); in stv0367cab_SetQamSize()
1851 stv0367_writereg(state, R367CAB_FSM_STATE, 0xa0); in stv0367cab_SetQamSize()
1852 stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xd1); in stv0367cab_SetQamSize()
1853 stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0xa7); in stv0367cab_SetQamSize()
1855 stv0367_writereg(state, R367CAB_EQU_CRL_LD_SEN, 0x95); in stv0367cab_SetQamSize()
1856 stv0367_writereg(state, R367CAB_EQU_CRL_LIMITER, 0x40); in stv0367cab_SetQamSize()
1857 stv0367_writereg(state, R367CAB_EQU_PNT_GAIN, 0x99); in stv0367cab_SetQamSize()
1860 stv0367_writereg(state, R367CAB_IQDEM_ADJ_AGC_REF, 0x00); in stv0367cab_SetQamSize()
1861 stv0367_writereg(state, R367CAB_AGC_PWR_REF_L, 0x76); in stv0367cab_SetQamSize()
1862 stv0367_writereg(state, R367CAB_FSM_STATE, 0x90); in stv0367cab_SetQamSize()
1863 stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xb1); in stv0367cab_SetQamSize()
1865 stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0xa7); in stv0367cab_SetQamSize()
1867 stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0xa6); in stv0367cab_SetQamSize()
1869 stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0x97); in stv0367cab_SetQamSize()
1871 stv0367_writereg(state, R367CAB_EQU_CRL_LD_SEN, 0x8e); in stv0367cab_SetQamSize()
1872 stv0367_writereg(state, R367CAB_EQU_CRL_LIMITER, 0x7f); in stv0367cab_SetQamSize()
1873 stv0367_writereg(state, R367CAB_EQU_PNT_GAIN, 0xa7); in stv0367cab_SetQamSize()
1876 stv0367_writereg(state, R367CAB_IQDEM_ADJ_AGC_REF, 0x94); in stv0367cab_SetQamSize()
1877 stv0367_writereg(state, R367CAB_AGC_PWR_REF_L, 0x5a); in stv0367cab_SetQamSize()
1878 stv0367_writereg(state, R367CAB_FSM_STATE, 0xa0); in stv0367cab_SetQamSize()
1880 stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xc1); in stv0367cab_SetQamSize()
1882 stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xc1); in stv0367cab_SetQamSize()
1884 stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xd1); in stv0367cab_SetQamSize()
1886 stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0xa7); in stv0367cab_SetQamSize()
1887 stv0367_writereg(state, R367CAB_EQU_CRL_LD_SEN, 0x85); in stv0367cab_SetQamSize()
1888 stv0367_writereg(state, R367CAB_EQU_CRL_LIMITER, 0x40); in stv0367cab_SetQamSize()
1889 stv0367_writereg(state, R367CAB_EQU_PNT_GAIN, 0xa7); in stv0367cab_SetQamSize()
1892 stv0367_writereg(state, R367CAB_IQDEM_ADJ_AGC_REF, 0x00); in stv0367cab_SetQamSize()
1895 stv0367_writereg(state, R367CAB_IQDEM_ADJ_AGC_REF, 0x00); in stv0367cab_SetQamSize()
1904 static u32 stv0367cab_set_derot_freq(struct stv0367_state *state, in stv0367cab_set_derot_freq() argument
1930 stv0367_writereg(state, R367CAB_MIX_NCO_LL, sampled_if); in stv0367cab_set_derot_freq()
1931 stv0367_writereg(state, R367CAB_MIX_NCO_HL, (sampled_if >> 8)); in stv0367cab_set_derot_freq()
1932 stv0367_writebits(state, F367CAB_MIX_NCO_INC_HH, (sampled_if >> 16)); in stv0367cab_set_derot_freq()
1937 static u32 stv0367cab_get_derot_freq(struct stv0367_state *state, u32 adc_hz) in stv0367cab_get_derot_freq() argument
1941 sampled_if = stv0367_readbits(state, F367CAB_MIX_NCO_INC_LL) + in stv0367cab_get_derot_freq()
1942 (stv0367_readbits(state, F367CAB_MIX_NCO_INC_HL) << 8) + in stv0367cab_get_derot_freq()
1943 (stv0367_readbits(state, F367CAB_MIX_NCO_INC_HH) << 16); in stv0367cab_get_derot_freq()
1953 static u32 stv0367cab_set_srate(struct stv0367_state *state, u32 adc_hz, in stv0367cab_set_srate() argument
1998 stv0367_writereg(state, R367CAB_EQU_CRL_TFR, (u8)u32_tmp); in stv0367cab_set_srate()
2072 if (stv0367_readbits(state, F367CAB_ADJ_EN)) { in stv0367cab_set_srate()
2073 stv0367cab_SetIirAdjacentcoefficient(state, mclk_hz, in stv0367cab_set_srate()
2077 stv0367_writebits(state, F367CAB_ALLPASSFILT_EN, 1); in stv0367cab_set_srate()
2078 stv0367cab_SetAllPasscoefficient(state, mclk_hz, SymbolRate); in stv0367cab_set_srate()
2083 stv0367_writebits(state, F367CAB_ALLPASSFILT_EN, 0); in stv0367cab_set_srate()
2085 stv0367_writereg(state, R367CAB_SRC_NCO_LL, u32_tmp); in stv0367cab_set_srate()
2086 stv0367_writereg(state, R367CAB_SRC_NCO_LH, (u32_tmp >> 8)); in stv0367cab_set_srate()
2087 stv0367_writereg(state, R367CAB_SRC_NCO_HL, (u32_tmp >> 16)); in stv0367cab_set_srate()
2088 stv0367_writereg(state, R367CAB_SRC_NCO_HH, (u32_tmp >> 24)); in stv0367cab_set_srate()
2090 stv0367_writereg(state, R367CAB_IQDEM_GAIN_SRC_L, u32_tmp1 & 0x00ff); in stv0367cab_set_srate()
2091 stv0367_writebits(state, F367CAB_GAIN_SRC_HI, (u32_tmp1 >> 8) & 0x00ff); in stv0367cab_set_srate()
2096 static u32 stv0367cab_GetSymbolRate(struct stv0367_state *state, u32 mclk_hz) in stv0367cab_GetSymbolRate() argument
2101 regsym = stv0367_readreg(state, R367CAB_SRC_NCO_LL) + in stv0367cab_GetSymbolRate()
2102 (stv0367_readreg(state, R367CAB_SRC_NCO_LH) << 8) + in stv0367cab_GetSymbolRate()
2103 (stv0367_readreg(state, R367CAB_SRC_NCO_HL) << 16) + in stv0367cab_GetSymbolRate()
2104 (stv0367_readreg(state, R367CAB_SRC_NCO_HH) << 24); in stv0367cab_GetSymbolRate()
2141 static u32 stv0367cab_fsm_status(struct stv0367_state *state) in stv0367cab_fsm_status() argument
2143 return stv0367_readbits(state, F367CAB_FSM_STATUS); in stv0367cab_fsm_status()
2146 static u32 stv0367cab_qamfec_lock(struct stv0367_state *state) in stv0367cab_qamfec_lock() argument
2148 return stv0367_readbits(state, in stv0367cab_qamfec_lock()
2149 (state->cab_state->qamfec_status_reg ? in stv0367cab_qamfec_lock()
2150 state->cab_state->qamfec_status_reg : in stv0367cab_qamfec_lock()
2209 struct stv0367_state *state = fe->demodulator_priv; in stv0367cab_read_status() local
2216 state->cab_state->state = stv0367cab_fsm_signaltype( in stv0367cab_read_status()
2217 stv0367cab_fsm_status(state)); in stv0367cab_read_status()
2219 if (stv0367cab_qamfec_lock(state)) { in stv0367cab_read_status()
2224 if (state->cab_state->state > FE_CAB_NOSIGNAL) in stv0367cab_read_status()
2227 if (state->cab_state->state > FE_CAB_NOCARRIER) in stv0367cab_read_status()
2230 if (state->cab_state->state >= FE_CAB_DEMODOK) in stv0367cab_read_status()
2233 if (state->cab_state->state >= FE_CAB_DATAOK) in stv0367cab_read_status()
2242 struct stv0367_state *state = fe->demodulator_priv; in stv0367cab_standby() local
2247 stv0367_writebits(state, F367CAB_BYPASS_PLLXN, 0x03); in stv0367cab_standby()
2248 stv0367_writebits(state, F367CAB_STDBY_PLLXN, 0x01); in stv0367cab_standby()
2249 stv0367_writebits(state, F367CAB_STDBY, 1); in stv0367cab_standby()
2250 stv0367_writebits(state, F367CAB_STDBY_CORE, 1); in stv0367cab_standby()
2251 stv0367_writebits(state, F367CAB_EN_BUFFER_I, 0); in stv0367cab_standby()
2252 stv0367_writebits(state, F367CAB_EN_BUFFER_Q, 0); in stv0367cab_standby()
2253 stv0367_writebits(state, F367CAB_POFFQ, 1); in stv0367cab_standby()
2254 stv0367_writebits(state, F367CAB_POFFI, 1); in stv0367cab_standby()
2256 stv0367_writebits(state, F367CAB_STDBY_PLLXN, 0x00); in stv0367cab_standby()
2257 stv0367_writebits(state, F367CAB_BYPASS_PLLXN, 0x00); in stv0367cab_standby()
2258 stv0367_writebits(state, F367CAB_STDBY, 0); in stv0367cab_standby()
2259 stv0367_writebits(state, F367CAB_STDBY_CORE, 0); in stv0367cab_standby()
2260 stv0367_writebits(state, F367CAB_EN_BUFFER_I, 1); in stv0367cab_standby()
2261 stv0367_writebits(state, F367CAB_EN_BUFFER_Q, 1); in stv0367cab_standby()
2262 stv0367_writebits(state, F367CAB_POFFQ, 0); in stv0367cab_standby()
2263 stv0367_writebits(state, F367CAB_POFFI, 0); in stv0367cab_standby()
2276 struct stv0367_state *state = fe->demodulator_priv; in stv0367cab_init() local
2277 struct stv0367cab_state *cab_state = state->cab_state; in stv0367cab_init()
2281 stv0367_write_table(state, in stv0367cab_init()
2282 stv0367_deftabs[state->deftabs][STV0367_TAB_CAB]); in stv0367cab_init()
2284 switch (state->config->ts_mode) { in stv0367cab_init()
2287 stv0367_writebits(state, F367CAB_OUTFORMAT, 0x03); in stv0367cab_init()
2291 stv0367_writebits(state, F367CAB_OUTFORMAT, 0x01); in stv0367cab_init()
2295 stv0367_writebits(state, F367CAB_OUTFORMAT, 0x00); in stv0367cab_init()
2299 switch (state->config->clk_pol) { in stv0367cab_init()
2301 stv0367_writebits(state, F367CAB_CLK_POLARITY, 0x00); in stv0367cab_init()
2305 stv0367_writebits(state, F367CAB_CLK_POLARITY, 0x01); in stv0367cab_init()
2309 stv0367_writebits(state, F367CAB_SYNC_STRIP, 0x00); in stv0367cab_init()
2311 stv0367_writebits(state, F367CAB_CT_NBST, 0x01); in stv0367cab_init()
2313 stv0367_writebits(state, F367CAB_TS_SWAP, 0x01); in stv0367cab_init()
2315 stv0367_writebits(state, F367CAB_FIFO_BYPASS, 0x00); in stv0367cab_init()
2317 stv0367_writereg(state, R367CAB_ANACTRL, 0x00);/*PLL enabled and used */ in stv0367cab_init()
2319 cab_state->mclk = stv0367cab_get_mclk(fe, state->config->xtal); in stv0367cab_init()
2320 cab_state->adc_clk = stv0367cab_get_adc_freq(fe, state->config->xtal); in stv0367cab_init()
2325 enum stv0367_cab_signal_type stv0367cab_algo(struct stv0367_state *state, in stv0367cab_algo() argument
2328 struct stv0367cab_state *cab_state = state->cab_state; in stv0367cab_algo()
2338 stv0367_get_if_khz(state, &ifkhz); in stv0367cab_algo()
2406 stv0367_writereg(state, R367CAB_CTRL_1, 0x04); in stv0367cab_algo()
2409 TrackAGCAccum = stv0367_readbits(state, F367CAB_AGC_ACCUMRSTSEL); in stv0367cab_algo()
2410 stv0367_writebits(state, F367CAB_AGC_ACCUMRSTSEL, 0x0); in stv0367cab_algo()
2412 stv0367_writebits(state, F367CAB_MODULUSMAP_EN, 0); in stv0367cab_algo()
2414 stv0367_writebits(state, F367CAB_SWEEP_EN, 0); in stv0367cab_algo()
2417 stv0367cab_set_derot_freq(state, cab_state->adc_clk, in stv0367cab_algo()
2421 stv0367_writebits(state, F367CAB_ADJ_EN, 0); in stv0367cab_algo()
2422 stv0367_writebits(state, F367CAB_ALLPASSFILT_EN, 0); in stv0367cab_algo()
2433 stv0367_writereg(state, R367CAB_CTRL_1, 0x00); in stv0367cab_algo()
2435 QAM_Lock = stv0367cab_fsm_status(state); in stv0367cab_algo()
2452 u32_tmp = stv0367_readbits(state, in stv0367cab_algo()
2454 (stv0367_readbits(state, in stv0367cab_algo()
2456 (stv0367_readbits(state, in stv0367cab_algo()
2460 u32_tmp = u32_tmp / (1 << (11 - stv0367_readbits(state, in stv0367cab_algo()
2463 if (u32_tmp < stv0367_readbits(state, in stv0367cab_algo()
2465 256 * stv0367_readbits(state, in stv0367cab_algo()
2473 tmp = stv0367_readreg(state, R367CAB_IT_STATUS1); in stv0367cab_algo()
2482 tmp = stv0367_readreg(state, R367CAB_IT_STATUS1); in stv0367cab_algo()
2484 tmp = stv0367_readreg(state, R367CAB_IT_STATUS2); in stv0367cab_algo()
2487 tmp = stv0367cab_get_derot_freq(state, cab_state->adc_clk); in stv0367cab_algo()
2496 QAMFEC_Lock = stv0367cab_qamfec_lock(state); in stv0367cab_algo()
2503 cab_state->spect_inv = stv0367_readbits(state, in stv0367cab_algo()
2511 - stv0367cab_get_derot_freq(state, cab_state->adc_clk) in stv0367cab_algo()
2516 - stv0367cab_get_derot_freq(state, cab_state->adc_clk) in stv0367cab_algo()
2522 stv0367cab_get_derot_freq(state, in stv0367cab_algo()
2527 cab_state->symbol_rate = stv0367cab_GetSymbolRate(state, in stv0367cab_algo()
2536 stv0367_writebits(state, F367CAB_AGC_ACCUMRSTSEL, TrackAGCAccum); in stv0367cab_algo()
2543 struct stv0367_state *state = fe->demodulator_priv; in stv0367cab_set_frontend() local
2544 struct stv0367cab_state *cab_state = state->cab_state; in stv0367cab_set_frontend()
2572 if (state->reinit_on_setfrontend) in stv0367cab_set_frontend()
2577 if (state->use_i2c_gatectrl && fe->ops.i2c_gate_ctrl) in stv0367cab_set_frontend()
2580 if (state->use_i2c_gatectrl && fe->ops.i2c_gate_ctrl) in stv0367cab_set_frontend()
2585 state, in stv0367cab_set_frontend()
2589 stv0367cab_set_srate(state, in stv0367cab_set_frontend()
2595 cab_state->state = stv0367cab_algo(state, p); in stv0367cab_set_frontend()
2602 struct stv0367_state *state = fe->demodulator_priv; in stv0367cab_get_frontend() local
2603 struct stv0367cab_state *cab_state = state->cab_state; in stv0367cab_get_frontend()
2610 stv0367_get_if_khz(state, &ifkhz); in stv0367cab_get_frontend()
2611 p->symbol_rate = stv0367cab_GetSymbolRate(state, cab_state->mclk); in stv0367cab_get_frontend()
2613 QAMSize = stv0367_readbits(state, F367CAB_QAM_MODE); in stv0367cab_get_frontend()
2640 (stv0367cab_get_derot_freq(state, cab_state->adc_clk) - in stv0367cab_get_frontend()
2647 - stv0367cab_get_derot_freq(state, cab_state->adc_clk) in stv0367cab_get_frontend()
2651 - stv0367cab_get_derot_freq(state, cab_state->adc_clk)); in stv0367cab_get_frontend()
2657 void stv0367cab_GetErrorCount(state, enum stv0367cab_mod QAMSize,
2660 stv0367cab_OptimiseNByteAndGetBER(state, QAMSize, symbol_rate, Monitor_results);
2661 stv0367cab_GetPacketsCount(state, Monitor_results);
2668 struct stv0367_state *state = fe->demodulator_priv;
2673 static s32 stv0367cab_get_rf_lvl(struct stv0367_state *state) in stv0367cab_get_rf_lvl() argument
2679 stv0367_writebits(state, F367CAB_STDBY_ADCGP, 0x0); in stv0367cab_get_rf_lvl()
2682 (stv0367_readbits(state, F367CAB_RF_AGC1_LEVEL_LO) & 0x03) + in stv0367cab_get_rf_lvl()
2683 (stv0367_readbits(state, F367CAB_RF_AGC1_LEVEL_HI) << 2); in stv0367cab_get_rf_lvl()
2687 stv0367_readbits(state, F367CAB_AGC_IF_PWMCMD_LO) + in stv0367cab_get_rf_lvl()
2688 (stv0367_readbits(state, F367CAB_AGC_IF_PWMCMD_HI) << 8); in stv0367cab_get_rf_lvl()
2721 struct stv0367_state *state = fe->demodulator_priv; in stv0367cab_read_strength() local
2723 s32 signal = stv0367cab_get_rf_lvl(state); in stv0367cab_read_strength()
2739 struct stv0367_state *state = fe->demodulator_priv; in stv0367cab_snr_power() local
2742 QAMSize = stv0367_readbits(state, F367CAB_QAM_MODE); in stv0367cab_snr_power()
2767 struct stv0367_state *state = fe->demodulator_priv; in stv0367cab_snr_readreg() local
2772 regval += (stv0367_readbits(state, F367CAB_SNR_LO) in stv0367cab_snr_readreg()
2773 + 256 * stv0367_readbits(state, F367CAB_SNR_HI)); in stv0367cab_snr_readreg()
2784 struct stv0367_state *state = fe->demodulator_priv; in stv0367cab_read_snr() local
2794 * (1 << (3 + stv0367_readbits(state, F367CAB_SNR_PER))); in stv0367cab_read_snr()
2839 struct stv0367_state *state = fe->demodulator_priv; in stv0367cab_read_ucblcks() local
2842 *ucblocks = (stv0367_readreg(state, R367CAB_RS_COUNTER_5) << 8) in stv0367cab_read_ucblcks()
2843 | stv0367_readreg(state, R367CAB_RS_COUNTER_4); in stv0367cab_read_ucblcks()
2844 corrected = (stv0367_readreg(state, R367CAB_RS_COUNTER_3) << 8) in stv0367cab_read_ucblcks()
2845 | stv0367_readreg(state, R367CAB_RS_COUNTER_2); in stv0367cab_read_ucblcks()
2846 tscount = (stv0367_readreg(state, R367CAB_RS_COUNTER_2) << 8) in stv0367cab_read_ucblcks()
2847 | stv0367_readreg(state, R367CAB_RS_COUNTER_1); in stv0367cab_read_ucblcks()
2886 struct stv0367_state *state = NULL; in stv0367cab_attach() local
2890 state = kzalloc(sizeof(struct stv0367_state), GFP_KERNEL); in stv0367cab_attach()
2891 if (state == NULL) in stv0367cab_attach()
2898 state->i2c = i2c; in stv0367cab_attach()
2899 state->config = config; in stv0367cab_attach()
2902 state->cab_state = cab_state; in stv0367cab_attach()
2903 state->fe.ops = stv0367cab_ops; in stv0367cab_attach()
2904 state->fe.demodulator_priv = state; in stv0367cab_attach()
2905 state->chip_id = stv0367_readreg(state, 0xf000); in stv0367cab_attach()
2908 state->use_i2c_gatectrl = 1; in stv0367cab_attach()
2909 state->deftabs = STV0367_DEFTAB_GENERIC; in stv0367cab_attach()
2910 state->reinit_on_setfrontend = 1; in stv0367cab_attach()
2911 state->auto_if_khz = 0; in stv0367cab_attach()
2913 dprintk("%s: chip_id = 0x%x\n", __func__, state->chip_id); in stv0367cab_attach()
2916 if ((state->chip_id != 0x50) && (state->chip_id != 0x60)) in stv0367cab_attach()
2919 return &state->fe; in stv0367cab_attach()
2923 kfree(state); in stv0367cab_attach()
2932 static void stv0367ddb_setup_ter(struct stv0367_state *state) in stv0367ddb_setup_ter() argument
2934 stv0367_writereg(state, R367TER_DEBUG_LT4, 0x00); in stv0367ddb_setup_ter()
2935 stv0367_writereg(state, R367TER_DEBUG_LT5, 0x00); in stv0367ddb_setup_ter()
2936 stv0367_writereg(state, R367TER_DEBUG_LT6, 0x00); /* R367CAB_CTRL_1 */ in stv0367ddb_setup_ter()
2937 stv0367_writereg(state, R367TER_DEBUG_LT7, 0x00); /* R367CAB_CTRL_2 */ in stv0367ddb_setup_ter()
2938 stv0367_writereg(state, R367TER_DEBUG_LT8, 0x00); in stv0367ddb_setup_ter()
2939 stv0367_writereg(state, R367TER_DEBUG_LT9, 0x00); in stv0367ddb_setup_ter()
2943 stv0367_writereg(state, R367TER_ANADIGCTRL, 0x89); in stv0367ddb_setup_ter()
2944 stv0367_writereg(state, R367TER_DUAL_AD12, 0x04); /* ADCQ disabled */ in stv0367ddb_setup_ter()
2948 stv0367_writereg(state, R367TER_ANACTRL, 0x0D); in stv0367ddb_setup_ter()
2949 stv0367_writereg(state, R367TER_TOPCTRL, 0x00); /* Set OFDM */ in stv0367ddb_setup_ter()
2952 stv0367_pll_setup(state, STV0367_ICSPEED_53125, state->config->xtal); in stv0367ddb_setup_ter()
2956 stv0367_writereg(state, R367TER_ANACTRL, 0x00); in stv0367ddb_setup_ter()
2958 state->activedemod = demod_ter; in stv0367ddb_setup_ter()
2961 static void stv0367ddb_setup_cab(struct stv0367_state *state) in stv0367ddb_setup_cab() argument
2963 stv0367_writereg(state, R367TER_DEBUG_LT4, 0x00); in stv0367ddb_setup_cab()
2964 stv0367_writereg(state, R367TER_DEBUG_LT5, 0x01); in stv0367ddb_setup_cab()
2965 stv0367_writereg(state, R367TER_DEBUG_LT6, 0x06); /* R367CAB_CTRL_1 */ in stv0367ddb_setup_cab()
2966 stv0367_writereg(state, R367TER_DEBUG_LT7, 0x03); /* R367CAB_CTRL_2 */ in stv0367ddb_setup_cab()
2967 stv0367_writereg(state, R367TER_DEBUG_LT8, 0x00); in stv0367ddb_setup_cab()
2968 stv0367_writereg(state, R367TER_DEBUG_LT9, 0x00); in stv0367ddb_setup_cab()
2972 stv0367_writereg(state, R367TER_ANADIGCTRL, 0x8B); in stv0367ddb_setup_cab()
2974 stv0367_writereg(state, R367TER_DUAL_AD12, 0x04); in stv0367ddb_setup_cab()
2978 stv0367_writereg(state, R367TER_ANACTRL, 0x0D); in stv0367ddb_setup_cab()
2980 stv0367_writereg(state, R367TER_TOPCTRL, 0x10); in stv0367ddb_setup_cab()
2983 stv0367_pll_setup(state, STV0367_ICSPEED_58000, state->config->xtal); in stv0367ddb_setup_cab()
2987 stv0367_writereg(state, R367TER_ANACTRL, 0x00); in stv0367ddb_setup_cab()
2989 state->cab_state->mclk = stv0367cab_get_mclk(&state->fe, in stv0367ddb_setup_cab()
2990 state->config->xtal); in stv0367ddb_setup_cab()
2991 state->cab_state->adc_clk = stv0367cab_get_adc_freq(&state->fe, in stv0367ddb_setup_cab()
2992 state->config->xtal); in stv0367ddb_setup_cab()
2994 state->activedemod = demod_cab; in stv0367ddb_setup_cab()
2999 struct stv0367_state *state = fe->demodulator_priv; in stv0367ddb_set_frontend() local
3003 if (state->activedemod != demod_ter) in stv0367ddb_set_frontend()
3004 stv0367ddb_setup_ter(state); in stv0367ddb_set_frontend()
3008 if (state->activedemod != demod_cab) in stv0367ddb_set_frontend()
3009 stv0367ddb_setup_cab(state); in stv0367ddb_set_frontend()
3027 struct stv0367_state *state = fe->demodulator_priv; in stv0367ddb_read_signal_strength() local
3031 switch (state->activedemod) { in stv0367ddb_read_signal_strength()
3033 signalstrength = stv0367cab_get_rf_lvl(state) * 1000; in stv0367ddb_read_signal_strength()
3046 struct stv0367_state *state = fe->demodulator_priv; in stv0367ddb_read_snr() local
3051 switch (state->activedemod) { in stv0367ddb_read_snr()
3079 struct stv0367_state *state = fe->demodulator_priv; in stv0367ddb_read_ucblocks() local
3083 switch (state->activedemod) { in stv0367ddb_read_ucblocks()
3102 struct stv0367_state *state = fe->demodulator_priv; in stv0367ddb_read_status() local
3106 switch (state->activedemod) { in stv0367ddb_read_status()
3141 struct stv0367_state *state = fe->demodulator_priv; in stv0367ddb_get_frontend() local
3143 switch (state->activedemod) { in stv0367ddb_get_frontend()
3157 struct stv0367_state *state = fe->demodulator_priv; in stv0367ddb_sleep() local
3159 switch (state->activedemod) { in stv0367ddb_sleep()
3161 state->activedemod = demod_none; in stv0367ddb_sleep()
3164 state->activedemod = demod_none; in stv0367ddb_sleep()
3173 static int stv0367ddb_init(struct stv0367_state *state) in stv0367ddb_init() argument
3175 struct stv0367ter_state *ter_state = state->ter_state; in stv0367ddb_init()
3176 struct dtv_frontend_properties *p = &state->fe.dtv_property_cache; in stv0367ddb_init()
3178 stv0367_writereg(state, R367TER_TOPCTRL, 0x10); in stv0367ddb_init()
3180 if (stv0367_deftabs[state->deftabs][STV0367_TAB_BASE]) in stv0367ddb_init()
3181 stv0367_write_table(state, in stv0367ddb_init()
3182 stv0367_deftabs[state->deftabs][STV0367_TAB_BASE]); in stv0367ddb_init()
3184 stv0367_write_table(state, in stv0367ddb_init()
3185 stv0367_deftabs[state->deftabs][STV0367_TAB_CAB]); in stv0367ddb_init()
3187 stv0367_writereg(state, R367TER_TOPCTRL, 0x00); in stv0367ddb_init()
3188 stv0367_write_table(state, in stv0367ddb_init()
3189 stv0367_deftabs[state->deftabs][STV0367_TAB_TER]); in stv0367ddb_init()
3191 stv0367_writereg(state, R367TER_GAIN_SRC1, 0x2A); in stv0367ddb_init()
3192 stv0367_writereg(state, R367TER_GAIN_SRC2, 0xD6); in stv0367ddb_init()
3193 stv0367_writereg(state, R367TER_INC_DEROT1, 0x55); in stv0367ddb_init()
3194 stv0367_writereg(state, R367TER_INC_DEROT2, 0x55); in stv0367ddb_init()
3195 stv0367_writereg(state, R367TER_TRL_CTL, 0x14); in stv0367ddb_init()
3196 stv0367_writereg(state, R367TER_TRL_NOMRATE1, 0xAE); in stv0367ddb_init()
3197 stv0367_writereg(state, R367TER_TRL_NOMRATE2, 0x56); in stv0367ddb_init()
3198 stv0367_writereg(state, R367TER_FEPATH_CFG, 0x0); in stv0367ddb_init()
3202 stv0367_writereg(state, R367TER_TSCFGH, 0x70); in stv0367ddb_init()
3203 stv0367_writereg(state, R367TER_TSCFGM, 0xC0); in stv0367ddb_init()
3204 stv0367_writereg(state, R367TER_TSCFGL, 0x20); in stv0367ddb_init()
3205 stv0367_writereg(state, R367TER_TSSPEED, 0x40); /* Fixed at 54 MHz */ in stv0367ddb_init()
3207 stv0367_writereg(state, R367TER_TSCFGH, 0x71); in stv0367ddb_init()
3208 stv0367_writereg(state, R367TER_TSCFGH, 0x70); in stv0367ddb_init()
3210 stv0367_writereg(state, R367TER_TOPCTRL, 0x10); in stv0367ddb_init()
3213 stv0367_writereg(state, R367TER_AGC12C, 0x01); /* AGC Pin setup */ in stv0367ddb_init()
3215 stv0367_writereg(state, R367TER_AGCCTRL1, 0x8A); in stv0367ddb_init()
3220 stv0367_writereg(state, R367CAB_OUTFORMAT_0, 0x85); in stv0367ddb_init()
3223 stv0367_writereg(state, R367TER_ANACTRL, 0x0D); in stv0367ddb_init()
3226 stv0367_pll_setup(state, STV0367_ICSPEED_58000, state->config->xtal); in stv0367ddb_init()
3230 stv0367_writereg(state, R367TER_ANADIGCTRL, 0x8b); in stv0367ddb_init()
3231 stv0367_writereg(state, R367TER_DUAL_AD12, 0x04); /* ADCQ disabled */ in stv0367ddb_init()
3234 stv0367_writereg(state, R367CAB_FSM_SNR2_HTH, 0x23); in stv0367ddb_init()
3236 stv0367_writereg(state, R367CAB_IQ_QAM, 0x01); in stv0367ddb_init()
3238 stv0367_writereg(state, R367CAB_EQU_FFE_LEAKAGE, 0x83); in stv0367ddb_init()
3240 stv0367_writereg(state, R367CAB_IQDEM_ADJ_EN, 0x05); in stv0367ddb_init()
3243 stv0367_writereg(state, R367TER_ANACTRL, 0x00); in stv0367ddb_init()
3245 stv0367_writereg(state, R367TER_I2CRPT, (0x08 | ((5 & 0x07) << 4))); in stv0367ddb_init()
3294 struct stv0367_state *state = NULL; in stv0367ddb_attach() local
3299 state = kzalloc(sizeof(struct stv0367_state), GFP_KERNEL); in stv0367ddb_attach()
3300 if (state == NULL) in stv0367ddb_attach()
3310 state->i2c = i2c; in stv0367ddb_attach()
3311 state->config = config; in stv0367ddb_attach()
3312 state->ter_state = ter_state; in stv0367ddb_attach()
3315 state->cab_state = cab_state; in stv0367ddb_attach()
3316 state->fe.ops = stv0367ddb_ops; in stv0367ddb_attach()
3317 state->fe.demodulator_priv = state; in stv0367ddb_attach()
3318 state->chip_id = stv0367_readreg(state, R367TER_ID); in stv0367ddb_attach()
3321 state->use_i2c_gatectrl = 0; in stv0367ddb_attach()
3322 state->deftabs = STV0367_DEFTAB_DDB; in stv0367ddb_attach()
3323 state->reinit_on_setfrontend = 0; in stv0367ddb_attach()
3324 state->auto_if_khz = 1; in stv0367ddb_attach()
3325 state->activedemod = demod_none; in stv0367ddb_attach()
3327 dprintk("%s: chip_id = 0x%x\n", __func__, state->chip_id); in stv0367ddb_attach()
3330 if ((state->chip_id != 0x50) && (state->chip_id != 0x60)) in stv0367ddb_attach()
3334 state->fe.ops.info.name, state->chip_id, in stv0367ddb_attach()
3337 stv0367ddb_init(state); in stv0367ddb_attach()
3339 return &state->fe; in stv0367ddb_attach()
3344 kfree(state); in stv0367ddb_attach()