213 	u32 reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_set_sd_power()
236 				tmp_resp = readb(priv->sdmmc_base + SDMMC_RSP);  in wmt_mci_read_response()
238 				tmp_resp = readb(priv->sdmmc_base + SDMMC_RSP +  in wmt_mci_read_response()
250 	reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR);  in wmt_mci_start_command()
268 	reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR);  in wmt_mci_send_command()
281 	reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR);  in wmt_mci_send_command()
381 	status0 = readb(priv->sdmmc_base + SDMMC_STS0);  in wmt_mci_regular_isr()
382 	status1 = readb(priv->sdmmc_base + SDMMC_STS1);  in wmt_mci_regular_isr()
383 	status2 = readb(priv->sdmmc_base + SDMMC_STS2);  in wmt_mci_regular_isr()
386 	reg_tmp = readb(priv->sdmmc_base + SDMMC_INTMASK0);  in wmt_mci_regular_isr()
470 	reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_reset_hardware()
474 	reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR);  in wmt_reset_hardware()
494 	reg_tmp = readb(priv->sdmmc_base + SDMMC_STS2);  in wmt_reset_hardware()
688 	busmode = readb(priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_mci_set_ios()
689 	extctrl = readb(priv->sdmmc_base + SDMMC_EXTCTRL);  in wmt_mci_set_ios()
714 	return !(readb(priv->sdmmc_base + SDMMC_STS0) & STS0_WRITE_PROTECT);  in wmt_mci_get_ro()
720 	u32 cd = (readb(priv->sdmmc_base + SDMMC_STS0) & STS0_CD_GPI) >> 3;  in wmt_mci_get_cd()
899 	reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_mci_remove()
941 	reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_mci_suspend()
965 		reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_mci_resume()
973 		reg_tmp = readb(priv->sdmmc_base + SDMMC_INTMASK0);  in wmt_mci_resume()