353 	outb_p(program_seq[i].value, ioaddr + program_seq[i].offset);  in get_prom()
409     outb_p(0x01, ioaddr + EN0_DCFG);	/* Set word-wide access. */  in get_ax88190()
410     outb_p(0x00, ioaddr + EN0_RSARLO);	/* DMA starting at 0x0400. */  in get_ax88190()
411     outb_p(0x04, ioaddr + EN0_RSARHI);  in get_ax88190()
412     outb_p(E8390_RREAD+E8390_START, ioaddr + E8390_CMD);  in get_ax88190()
771 	outb_p(EE_EEP|EE_CS|dataval, ee_addr);  in read_eeprom()
772 	outb_p(EE_EEP|EE_CS|dataval|EE_CK, ee_addr);  in read_eeprom()
777 	outb_p(EE_EEP|EE_CS | EE_CK, ee_addr);  in read_eeprom()
779 	outb_p(EE_EEP|EE_CS, ee_addr);  in read_eeprom()
810 		outb_p(EE_ASIC|EE_CS|EE_DI|dataval, ee_addr);  in write_asic()
811 		outb_p(EE_ASIC|EE_CS|EE_DI|dataval|EE_CK, ee_addr);  in write_asic()
812 		outb_p(EE_ASIC|EE_CS|EE_DI|dataval, ee_addr);  in write_asic()
821 		outb_p(EE_ASIC|EE_CS|dataval, ee_addr);  in write_asic()
822 		outb_p(EE_ASIC|EE_CS|dataval|EE_CK, ee_addr);  in write_asic()
823 		outb_p(EE_ASIC|EE_CS|dataval, ee_addr);  in write_asic()
850 	outb_p(tmp, nic_base + PCNET_MISC);  in set_misc_reg()
912     outb_p(0xFF, nic_base + EN0_ISR); /* Clear bogus intr. */  in pcnet_open()
960     outb_p(E8390_NODMA+E8390_PAGE0+E8390_STOP, nic_base + E8390_CMD);  in pcnet_reset_8390()
969     outb_p(ENISR_RESET, nic_base + EN0_ISR); /* Ack intr. */  in pcnet_reset_8390()
1138     outb_p(E8390_NODMA+E8390_PAGE0+E8390_START, nic_base + PCNET_CMD);  in dma_get_8390_hdr()
1139     outb_p(sizeof(struct e8390_pkt_hdr), nic_base + EN0_RCNTLO);  in dma_get_8390_hdr()
1140     outb_p(0, nic_base + EN0_RCNTHI);  in dma_get_8390_hdr()
1141     outb_p(0, nic_base + EN0_RSARLO);		/* On page boundary */  in dma_get_8390_hdr()
1142     outb_p(ring_page, nic_base + EN0_RSARHI);  in dma_get_8390_hdr()
1143     outb_p(E8390_RREAD+E8390_START, nic_base + PCNET_CMD);  in dma_get_8390_hdr()
1150     outb_p(ENISR_RDC, nic_base + EN0_ISR);	/* Ack intr. */  in dma_get_8390_hdr()
1173     outb_p(E8390_NODMA+E8390_PAGE0+E8390_START, nic_base + PCNET_CMD);  in dma_block_input()
1174     outb_p(count & 0xff, nic_base + EN0_RCNTLO);  in dma_block_input()
1175     outb_p(count >> 8, nic_base + EN0_RCNTHI);  in dma_block_input()
1176     outb_p(ring_offset & 0xff, nic_base + EN0_RSARLO);  in dma_block_input()
1177     outb_p(ring_offset >> 8, nic_base + EN0_RSARHI);  in dma_block_input()
1178     outb_p(E8390_RREAD+E8390_START, nic_base + PCNET_CMD);  in dma_block_input()
1207     outb_p(ENISR_RDC, nic_base + EN0_ISR);	/* Ack intr. */  in dma_block_input()
1241     outb_p(E8390_PAGE0+E8390_START+E8390_NODMA, nic_base+PCNET_CMD);  in dma_block_output()
1247     outb_p(ENISR_RDC, nic_base + EN0_ISR);  in dma_block_output()
1250     outb_p(count & 0xff, nic_base + EN0_RCNTLO);  in dma_block_output()
1251     outb_p(count >> 8,   nic_base + EN0_RCNTHI);  in dma_block_output()
1252     outb_p(0x00, nic_base + EN0_RSARLO);  in dma_block_output()
1253     outb_p(start_page, nic_base + EN0_RSARHI);  in dma_block_output()
1255     outb_p(E8390_RWRITE+E8390_START, nic_base + PCNET_CMD);  in dma_block_output()
1291     outb_p(ENISR_RDC, nic_base + EN0_ISR);	/* Ack intr. */  in dma_block_output()