436 	u32 dw0;  member
446 	__le32 dw0;  member
1154 		prot->dw0 |= T10_INSRT_EN_MSK;  in fill_prot_v3_hw()
1158 		prot->dw0 |= (T10_RMV_EN_MSK | T10_CHK_EN_MSK);  in fill_prot_v3_hw()
1163 		prot->dw0 |= T10_CHK_EN_MSK;  in fill_prot_v3_hw()
1168 		prot->dw0 |= T10_INSRT_EN_MSK;  in fill_prot_v3_hw()
1172 		prot->dw0 |= (T10_RMV_EN_MSK | T10_CHK_EN_MSK);  in fill_prot_v3_hw()
1176 		prot->dw0 |= T10_CHK_EN_MSK;  in fill_prot_v3_hw()
1189 		prot->dw0 |= (0x1 << USR_DATA_BLOCK_SZ_OFF);  in fill_prot_v3_hw()
1192 		prot->dw0 |= (0x2 << USR_DATA_BLOCK_SZ_OFF);  in fill_prot_v3_hw()
1200 	prot->dw0 |= INCR_LBRT_MSK;  in fill_prot_v3_hw()
1219 	hdr->dw0 = cpu_to_le32((1 << CMD_HDR_RESP_REPORT_OFF) |  in prep_ssp_v3_hw()
1344 	hdr->dw0 = cpu_to_le32((port->id << CMD_HDR_PORT_OFF) |  in prep_smp_v3_hw()
1378 	hdr->dw0 = cpu_to_le32(port->id << CMD_HDR_PORT_OFF);  in prep_ata_v3_hw()
1380 		hdr->dw0 |= cpu_to_le32(3 << CMD_HDR_CMD_OFF);  in prep_ata_v3_hw()
1382 		hdr->dw0 |= cpu_to_le32(4U << CMD_HDR_CMD_OFF);  in prep_ata_v3_hw()
1453 	hdr->dw0 = cpu_to_le32((5U << CMD_HDR_CMD_OFF) | /*abort*/  in prep_abort_v3_hw()
2138 	u32 dw0 = le32_to_cpu(complete_hdr->dw0);  in slot_err_v3_hw()  local
2148 			if (!(dw0 & CMPLT_HDR_RSPNS_GOOD_MSK) &&  in slot_err_v3_hw()
2149 			    (dw0 & CMPLT_HDR_RSPNS_XFRD_MSK))  in slot_err_v3_hw()
2165 		if ((dw0 & CMPLT_HDR_RSPNS_XFRD_MSK) &&  in slot_err_v3_hw()
2178 		if (dw0 & CMPLT_HDR_RSPNS_XFRD_MSK)  in slot_err_v3_hw()
2205 	u32 dw0, dw1, dw3;  in slot_complete_v3_hw()  local
2229 	dw0 = le32_to_cpu(complete_hdr->dw0);  in slot_complete_v3_hw()
2236 	switch ((dw0 & CMPLT_HDR_ABORT_STAT_MSK) >> CMPLT_HDR_ABORT_STAT_OFF) {  in slot_complete_v3_hw()
2259 	if ((dw0 & CMPLT_HDR_CMPLT_MSK) == 0x3) {  in slot_complete_v3_hw()
2267 					dw0, dw1, complete_hdr->act, dw3,  in slot_complete_v3_hw()
2305 		if (dw0 & CMPLT_HDR_RSPNS_XFRD_MSK)  in slot_complete_v3_hw()