387 	temp = readb(port->membase + UARTCR2);  in lpuart_stop_tx()
405 	temp = readb(port->membase + UARTCR2);  in lpuart_stop_rx()
564 		val = readb(sport->port.membase + UARTCFIFO);  in lpuart_flush_buffer()
573 	while (!(readb(port->membase + offset) & bit))  in lpuart_wait_bit_set()
599 	temp = readb(sport->port.membase + UARTPFIFO);  in lpuart_poll_init()
609 	if (readb(sport->port.membase + UARTSR1) & UARTSR1_RDRF) {  in lpuart_poll_init()
610 		readb(sport->port.membase + UARTDR);  in lpuart_poll_init()
633 	if (!(readb(port->membase + UARTSR1) & UARTSR1_RDRF))  in lpuart_poll_get_char()
636 	return readb(port->membase + UARTDR);  in lpuart_poll_get_char()
705 		(readb(sport->port.membase + UARTTCFIFO) < sport->txfifo_size)) {  in lpuart_transmit_buffer()
760 	temp = readb(port->membase + UARTCR2);  in lpuart_start_tx()
767 		if (readb(port->membase + UARTSR1) & UARTSR1_TDRE)  in lpuart_start_tx()
794 	unsigned char sr1 = readb(port->membase + UARTSR1);  in lpuart_tx_empty()
795 	unsigned char sfifo = readb(port->membase + UARTSFIFO);  in lpuart_tx_empty()
846 	while (!(readb(sport->port.membase + UARTSFIFO) & UARTSFIFO_RXEMPT)) {  in lpuart_rxint()
853 		sr = readb(sport->port.membase + UARTSR1);  in lpuart_rxint()
854 		rx = readb(sport->port.membase + UARTDR);  in lpuart_rxint()
981 	sts = readb(sport->port.membase + UARTSR1);  in lpuart_int()
985 		readb(sport->port.membase + UARTDR);  in lpuart_int()
1074 		unsigned char sr = readb(sport->port.membase + UARTSR1);  in lpuart_copy_rx_to_tty()
1080 			cr2 = readb(sport->port.membase + UARTCR2);  in lpuart_copy_rx_to_tty()
1085 			readb(sport->port.membase + UARTDR);  in lpuart_copy_rx_to_tty()
1100 			if (readb(sport->port.membase + UARTSFIFO) &  in lpuart_copy_rx_to_tty()
1273 		writeb(readb(sport->port.membase + UARTCR5) | UARTCR5_RDMAS,  in lpuart_start_rx_dma()
1302 	u8 modem = readb(sport->port.membase + UARTMODEM) &  in lpuart_config_rs485()
1403 	reg = readb(port->membase + UARTMODEM);  in lpuart_get_mctrl()
1426 		temp = readb(sport->port.membase + UARTMODEM) &  in lpuart_set_mctrl()
1448 	temp = readb(port->membase + UARTCR2) & ~UARTCR2_SBK;  in lpuart_break_ctl()
1495 	cr2 = readb(sport->port.membase + UARTCR2);  in lpuart_setup_watermark()
1501 	val = readb(sport->port.membase + UARTPFIFO);  in lpuart_setup_watermark()
1510 	if (readb(sport->port.membase + UARTSR1) & UARTSR1_RDRF) {  in lpuart_setup_watermark()
1511 		readb(sport->port.membase + UARTDR);  in lpuart_setup_watermark()
1528 	cr2 = readb(sport->port.membase + UARTCR2);  in lpuart_setup_watermark_enable()
1617 		writeb(readb(sport->port.membase + UARTCR5) |  in lpuart_tx_dma_startup()
1651 		cr3 = readb(sport->port.membase + UARTCR3);  in lpuart_rx_dma_startup()
1669 	temp = readb(sport->port.membase + UARTPFIFO);  in lpuart_startup()
1783 	temp = readb(port->membase + UARTCR2);  in lpuart_shutdown()
1824 	cr1 = old_cr1 = readb(sport->port.membase + UARTCR1);  in lpuart_set_termios()
1825 	old_cr2 = readb(sport->port.membase + UARTCR2);  in lpuart_set_termios()
1826 	cr3 = readb(sport->port.membase + UARTCR3);  in lpuart_set_termios()
1827 	cr4 = readb(sport->port.membase + UARTCR4);  in lpuart_set_termios()
1828 	bdh = readb(sport->port.membase + UARTBDH);  in lpuart_set_termios()
1829 	modem = readb(sport->port.membase + UARTMODEM);  in lpuart_set_termios()
2313 	cr2 = old_cr2 = readb(sport->port.membase + UARTCR2);  in lpuart_console_write()
2370 	cr = readb(sport->port.membase + UARTCR2);  in lpuart_console_get_options()
2377 	cr = readb(sport->port.membase + UARTCR1);  in lpuart_console_get_options()
2392 	bdh = readb(sport->port.membase + UARTBDH);  in lpuart_console_get_options()
2394 	bdl = readb(sport->port.membase + UARTBDL);  in lpuart_console_get_options()
2398 	brfa = readb(sport->port.membase + UARTCR4);  in lpuart_console_get_options()
2759 		temp = readb(sport->port.membase + UARTCR2);  in lpuart_suspend()
2787 			writeb(readb(sport->port.membase + UARTCR5) &  in lpuart_suspend()